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DSP56857 датащи(PDF) 58 Page - Freescale Semiconductor, Inc |
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DSP56857 датащи(HTML) 58 Page - Freescale Semiconductor, Inc |
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58 / 662 page ![]() 56853 Peripheral Blocks 5685X Digital Signal Controller User Manual, Rev. 4 1-26 Freescale Semiconductor 1.6.3 Boot ROM • Single port ROM is compatible with the pipelined program bus structure • Single cycle reads at 120MHz 1.7 56853 Peripheral Blocks The 56853 provides these peripheral blocks: • Two Serial Communication Interfaces (SCI0 and SCI2), each with two pins, or four additional GPIO lines • Enhanced Synchronous Serial Interface (ESSI0), with six pins or additional GPIO lines • General Purpose 16-bit Quad Timer (TMR), with four pins or additional GPIO lines • One Serial Peripheral Interface (SPI), with four pins or additional GPIO lines • Eight-bit Host Interface (HI8) with 16 pins, or 16 additional GPIO lines • Interrupt Controller • Computer Operating Properly (COP)/Watchdog Timer • Time of Day (TOD) • Clock Generator • System Integration Module (SIM) • External Memory Interface (EMI) • JTAG/Enhanced On-Chip Emulation (EOnCE) for unobtrusive, real-time debugging 1.8 56854 Peripheral Blocks The 56854 provides these peripheral blocks: • Two Serial Communication Interfaces (SCI), each with two pins, or four additional GPIO lines • Enhanced Synchronous Serial Interface (ESSI0), with six pins or additional GPIO lines • General Purpose 16-bit Quad Timer (TMR) with four pins or additional GPIO lines • Serial Port Interface (SPI) with four pins or additional GPIO lines • Eight-bit Parallel Host Interface (HI8) with 16 pins, or 16 additional GPIO lines • Interrupt Controller • Computer Operating Properly (COP)/Watchdog Timer • Time of Day (TOD) • Clock Generator • System Integration Module (SIM) |
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