DSP56857 datasheet(63/662 Pages) FREESCALE

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Peripheral Descriptions

5685X Overview, Rev. 4

Freescale Semiconductor

1-31

•

Counters are preloadable

•

Counters can share available input pins

•

Separate prescaler for each counter

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Each counter has capture and compare capability

1.12.6 Serial Peripheral Interface (SPI)

The Serial Peripheral Interface (SPI) is an independent serial communications subsystem

allowing full-duplex, synchronous, serial communication between the signal controller and

peripheral devices, including other DSCs. Software can poll SPI status flags or SPI operation can

be interrupt driven. This block contains four, 16-bit memory mapped registers for control

parameters, status, and data transfer. SPI features include:

•

Full-duplex operation

•

Master and slave modes

•

Double-buffered operation with separate transmit and receive registers

•

Programmable length transmissions (2 to 16 bits)

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Programmable transmit and receive shift order (MSB first or last bit transmitted)

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Eight master mode frequencies (maximum = bus frequency/2

•

Maximum slave mode frequency = bus frequency

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Clock ground for reduced Radio Frequency (RF) interference

•

Serial clock with programmable polarity and phase

•

Two separately enabled interrupts

— SPRF (SPI Receiver Full)

— SPTE (SPI Transmitter Empty)

•

Mode fault error flag interrupt capability

•

Direct Memory Access (DMA) capability for both the transmitter and receiver

•

Wired OR mode functionality to enabling connection to multiple SPIs

1. This frequency may be further limited by the GPIO function.

DSP56857 датащи(PDF) 63 Page - Freescale Semiconductor, Inc

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