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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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PIC18F4539-E/MLSQTP датащи(PDF) 13 Page - Microchip Technology |
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PIC18F4539-E/MLSQTP датащи(HTML) 13 Page - Microchip Technology |
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13 / 322 page  2002 Microchip Technology Inc. Preliminary DS30485A-page 11 PIC18FXX39 TABLE 1-2: PIC18F2X39 PINOUT I/O DESCRIPTIONS Pin Name Pin Number Pin Type Buffer Type Description DIP SOIC MCLR/VPP MCLR VPP 11 I I ST ST Master Clear (input) or high voltage ICSP programming enable pin. Master Clear (Reset) input. This pin is an active low RESET to the device. High voltage ICSP programming enable pin. NC — — — — These pins should be left unconnected. OSC1/CLKI OSC1 CLKI 99 I I CMOS CMOS Oscillator crystal or external clock input. Oscillator crystal input or external clock source input. External clock source input. Always associated with pin function OSC1. (See related OSC1/CLKI, OSC2/CLKO pins.) OSC2/CLKO/RA6 OSC2 CLKO RA6 10 10 O O I/O — — TTL Oscillator crystal or clock output. Oscillator crystal output. Connects to crystal or resonator in Crystal Oscillator mode. In EC mode, OSC2 pin outputs CLKO which has 1/4 the frequency of OSC1, and denotes the instruction cycle rate. General purpose I/O pin. PORTA is a bi-directional I/O port. RA0/AN0 RA0 AN0 22 I/O I TTL Analog Digital I/O. Analog input 0. RA1/AN1 RA1 AN1 33 I/O I TTL Analog Digital I/O. Analog input 1. RA2/AN2/VREF- RA2 AN2 VREF- 44 I/O I I TTL Analog Analog Digital I/O. Analog input 2. A/D Reference Voltage (Low) input. RA3/AN3/VREF+ RA3 AN3 VREF+ 55 I/O I I TTL Analog Analog Digital I/O. Analog input 3. A/D Reference Voltage (High) input. RA4/T0CKI RA4 T0CKI 66 I/O I ST/OD ST Digital I/O. Open drain when configured as output. Timer0 external clock input. RA5/AN4/SS/LVDIN RA5 AN4 SS LVDIN 77 I/O I I I TTL Analog ST Analog Digital I/O. Analog input 4. SPI Slave Select input. Low Voltage Detect input. RA6 See the OSC2/CLKO/RA6 pin. Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output ST = Schmitt Trigger input with CMOS levels I = Input O = Output P = Power OD = Open Drain (no P diode to VDD) |
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