PIC18F4539-ESLASHMLSQTP datasheet(53/322 Pages) MICROCHIP

53 / 322 page

 2002 Microchip Technology Inc.

Preliminary

DS30485A-page 51

PIC18FXX39

5.0

FLASH PROGRAM MEMORY

The FLASH Program Memory is readable, writable,

and erasable during normal operation over the entire

VDD range.

A read from program memory is executed on one byte

at a time. A write to program memory is executed on

blocks of 8 bytes at a time. Program memory is erased

in blocks of 64 bytes at a time. A bulk erase operation

may not be issued from user code.

Writing or erasing program memory will cease instruc-

tion fetches until the operation is complete. The pro-

gram memory cannot be accessed during the write or

erase, therefore, code cannot execute. An internal pro-

gramming timer terminates program memory writes

and erases.

A value written to program memory does not need to be

a valid instruction. Executing a program memory

location that forms an invalid instruction results in a

NOP

5.1

Table Reads and Table Writes

In order to read and write program memory, there are

two operations that allow the processor to move bytes

between the program memory space and the data

RAM:

• Table Read (TBLRD)

• Table Write (TBLWT)

The program memory space is 16-bits wide, while the

data RAM space is 8-bits wide. Table Reads and Table

Writes move data between these two memory spaces

through an 8-bit register (TABLAT).

Table Read operations retrieve data from program

memory and places it into the data RAM space.

Figure 5-1 shows the operation of a Table Read with

program memory and data RAM.

Table Write operations store data from the data mem-

ory space into holding registers in program memory.

The procedure to write the contents of the holding reg-

isters into program memory is detailed in Section 5.5,

“Writing to FLASH Program Memory”. Figure 5-2

shows the operation of a Table Write with program

memory and data RAM.

Table operations work with byte entities. A table block

containing data, rather than program instructions, is not

required to be word aligned. Therefore, a table block

can start and end at any byte address. If a Table Write

is being used to write executable code into program

memory, program instructions will need to be word

aligned.

FIGURE 5-1:

TABLE READ OPERATION

Table Pointer(1)

Table Latch (8-bit)

Program Memory

TBLPTRH

TBLPTRL

TABLAT

TBLPTRU

Instruction: TBLRD*

Note 1: Table Pointer points to a byte in program memory.

Program Memory

(TBLPTR)

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