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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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PIC18F4539-E/MLSQTP датащи(PDF) 29 Page - Microchip Technology |
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PIC18F4539-E/MLSQTP датащи(HTML) 29 Page - Microchip Technology |
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29 / 322 page  2002 Microchip Technology Inc. Preliminary DS30485A-page 27 PIC18FXX39 FSR1H 2439 4439 2539 4539 ---- xxxx ---- uuuu ---- uuuu FSR1L 2439 4439 2539 4539 xxxx xxxx uuuu uuuu uuuu uuuu BSR 2439 4439 2539 4539 ---- 0000 ---- 0000 ---- uuuu INDF2 2439 4439 2539 4539 N/A N/A N/A POSTINC2 2439 4439 2539 4539 N/A N/A N/A POSTDEC2 2439 4439 2539 4539 N/A N/A N/A PREINC2 2439 4439 2539 4539 N/A N/A N/A PLUSW2 2439 4439 2539 4539 N/A N/A N/A FSR2H 2439 4439 2539 4539 ---- xxxx ---- uuuu ---- uuuu FSR2L 2439 4439 2539 4539 xxxx xxxx uuuu uuuu uuuu uuuu STATUS 2439 4439 2539 4539 ---x xxxx ---u uuuu ---u uuuu TMR0H 2439 4439 2539 4539 0000 0000 uuuu uuuu uuuu uuuu TMR0L 2439 4439 2539 4539 xxxx xxxx uuuu uuuu uuuu uuuu T0CON 2439 4439 2539 4539 1111 1111 1111 1111 uuuu uuuu OSCCON* 2439 4439 2539 4539 ---- ---0 ---- ---0 ---- ---u LVDCON 2439 4439 2539 4539 --00 0101 --00 0101 --uu uuuu WDTCON 2439 4439 2539 4539 ---- ---0 ---- ---0 ---- ---u RCON(4) 2439 4439 2539 4539 0--q 11qq 0--q qquu u--u qquu TMR1H 2439 4439 2539 4539 xxxx xxxx uuuu uuuu uuuu uuuu TMR1L 2439 4439 2539 4539 xxxx xxxx uuuu uuuu uuuu uuuu T1CON 2439 4439 2539 4539 0-00 0000 u-uu uuuu u-uu uuuu TMR2* 2439 4439 2539 4539 0000 0000 0000 0000 uuuu uuuu PR2* 2439 4439 2539 4539 1111 1111 1111 1111 1111 1111 T2CON* 2439 4439 2539 4539 -000 0000 -000 0000 -uuu uuuu SSPBUF 2439 4439 2539 4539 xxxx xxxx uuuu uuuu uuuu uuuu SSPADD 2439 4439 2539 4539 0000 0000 0000 0000 uuuu uuuu SSPSTAT 2439 4439 2539 4539 0000 0000 0000 0000 uuuu uuuu SSPCON1 2439 4439 2539 4539 0000 0000 0000 0000 uuuu uuuu SSPCON2 2439 4439 2539 4539 0000 0000 0000 0000 uuuu uuuu TABLE 3-3: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED) Register Applicable Devices Power-on Reset, Brown-out Reset MCLR Resets WDT Reset RESET Instruction Stack Resets Wake-up via WDT or Interrupt Legend: u = unchanged, x = unknown, - = unimplemented bit, read as '0', q = value depends on condition. Shaded cells indicate conditions do not apply for the designated device. * These registers are retained to maintain compatibility with PIC18FXX2 devices; however, one or more bits are reserved. Users should not modify the value of these bits. See Section 4.9.2 for details. Note 1: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are updated with the current value of the PC. The STKPTR is modified to point to the next location in the hardware stack. 2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt vector (0008h or 0018h). 3: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up). 4: See Table 3-2 for RESET value for specific condition. 5: Bit 6 of PORTA, LATA, and TRISA are enabled in ECIO and RCIO Oscillator modes only. In all other Oscillator modes, they are disabled and read ‘0’. 6: Bit 6 of PORTA, LATA and TRISA are not available on all devices. When unimplemented, they are read ‘0’. |
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