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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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DS2148 датащи(PDF) 53 Page - Dallas Semiconductor |
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DS2148 датащи(HTML) 53 Page - Dallas Semiconductor |
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53 / 75 page  DS2148/Q48 53 of 75 PROTECTED INTERFACE USING EXTERNAL RECEIVE TERMINATION Figure 9-3 NOTES: 1) All resistor values are ±1%. 2) C1 = 0.1µF. 3) S is a 6V transient suppresser. 4) D1 to D4 are Schottky diodes. 5) The fuses are optional to prevent AC power line crosses from compromising the transformers. 6) Rp resistors exist to keep the Fuses from opening during a surge. If they are used, then Rr must be adjusted to match the line impedance. 7) Rr = 37.5 W for 75W, 60W for 120W E1 systems, or 50W for 100W T1 lines. 8) The Rt resistors are used to increase the transmitter return loss (Table 9-1). No return loss is required for T1 applications. 9) The transmit transformer turns ratio (N) would be 1:1.36 for 5V operation. 10) The 68 mF is used to keep the local power plane potential within tolerance during a surge. RTIP RRING TTIP TRING Receive Line N:1 (larger winding toward the network) DS2148 0.47µF (non- polarized) VDD (21) VSS (22) VDD (36) VSS (35) 2.048MHz (this clock can also be 1.544MHz for T1 only applications) MCLK +VDD S C1 D1 D2 D3 D4 1:1 0.1µF 470 470 Rp Fuse Rp Fuse Rr Rr Rt Rt (optional) Transmit Line Rp Fuse Rp Fuse (optional) 0.1µF 0.1µF +VDD 0.01µF 68µF 10µF 10µF |
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