DS2148 datasheet(6/75 Pages) DALLAS

6 / 75 page

DS2148/Q48

6 of 75

3. INTRODUCTION

The analog AMI/HDB3 waveform off the E1 line or the AMI/B8ZS waveform off the T1 line is

transformer coupled into the RTIP and RRING pins of the DS2148. The user has the option to use

internal software-selectable receive-side termination for 75Ω/100Ω/120

W applications or external

termination. The device recovers clock and data from the analog signal and passes it through the jitter

attenuation MUX outputting the received line clock at RCLK and bipolar or NRZ data at RPOS and

RNEG. The DS2148 contains an active filter that reconstructs the analog-received signal for the nonlinear

losses that occur in transmission. The receive circuitry also is configurable for various monitor

applications. The device has a usable receive sensitivity of 0dB to -43dB (E1) and 0dB to -36dB (T1),

which allows the device to operate on 0.63mm (22AWG) cables up to 2.5km (E1) and 6k feet (T1) in

length. Data input at TPOS and TNEG is sent via the jitter attenuation MUX to the waveshaping circuitry

and line driver. The DS2148 will drive the E1 or T1 line from the TTIP and TRING pins via a coupling

transformer. The line driver can handle both CEPT 30/ISDN-PRI lines for E1 and long-haul (CSU) or

short-haul (DSX-1) lines for T1.

3.1

DOCUMENT REVISION HISTORY

1) 100

W/60W termination reversed in Internal Rx Termination Select tables, 091799.

2) Add DS21Q48 pinout, 092899.

3) Correct VSM pin number in Q48 (12 x 12 BGA) from G5 to G4, 120699.

4) Add timing diagram for Status Register (write access mode); Add mechanical dimensions for the

quad version, 032900.

5) Timing diagram for Status Register (write access mode) added; elaboration on burst mode bit; add

mechanical dimensions for the quad version, 050300.

6) Changes to datasheet to indicate 5V only part, 011801.

7) Added supply current measurement; added thermal characteristics of quad package, 092001.

8) Corrected typos and removed instances of 3V operation, 082504.

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