DS2148 datasheet(32/75 Pages) DALLAS

32 / 75 page

DS2148/Q48

32 of 75

CCR5 (04H): COMMON CONTROL REGISTER 5

(MSB)

(LSB)

BPCS1

BPCS0

MM1

MM0

RSCLKE

TSCLKE

RT1

RT0

SYMBOL

POSITION

DESCRIPTION

BPCS1

CCR5.7

Back Plane Clock Select 1. See Table 6-3 for details.

BPCS0

CCR5.6

Back Plane Clock Select 0. See Table 6-3 for details.

MM1

CCR5.5

Monitor Mode 1. See Table 6-4.

MM0

CCR5.4

Monitor Mode 0. See Table 6-4.

RSCLKE

CCR5.3

Receive Synchronization Clock Enable.

This control bit determines whether the line receiver should

handle normal T1/E1 signals or a synchronized signal.

E1 mode:

0 = receive normal E1 signal (Section 6 of G.703)

1 = receive 2.048 MHz synchronization signal (section 10 of

G.703)

T1 mode:

0 = receive normal T1 signal

1 = receive 1.544 MHz synchronization signal

TSCLKE

CCR5.2

Transmit Synchronization Clock Enable.

This control bit determines whether the transmitter should

transmit normal T1/E1 signals or a synchronized signal.

E1 mode:

0 = transmit normal E1 signal (section 6 of G.703)

1 = transmit 2.048 MHz synchronization signal (section 10 of

G.703)

T1 mode:

0 = transmit normal T1 signal

1 = transmit 1.544 MHz synchronization signal

RT1

CCR5.1

Receive Termination 1. See Table 6-5 for details.

RT0

CCR5.0

Receive Termination 0. See Table 6-5 for details.

BACK PLANE CLOCK SELECT Table 6-3

BPCS1

(CCR5.7)

BPCS0

(CCR5.6)

BPCLK FREQUENCY

16.384MHz

8.192MHz

4.096MHz

2.048MHz

MONITOR GAIN SETTINGS Table 6-4

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