DS2148 datasheet(38/75 Pages) DALLAS

38 / 75 page

DS2148/Q48

38 of 75

RIR1 (08H): RECEIVE INFORMATION REGISTER 1

(MSB)

(LSB)

16ZD

HBD

RCLC

RUA1C

JALT

N/A

SYMBOL

POSITION

DESCRIPTION

(latched)

RIR1.7

Zero Detect. Set when a string of at least four (ETS = 0) or

eight (ETS = 1) consecutive zeros (regardless of the length of

the string) have been received. Will be cleared when read.

16ZD

(latched)

RIR1.6

Sixteen Zero Detect. Set when at least 16 consecutive zeros

(regardless of the length of the string) have been received. Will

be cleared when read.

HBD

(latched)

RIR1.5

HDB3/B8ZS Word Detect. Set when an HDB3 (ETS = 0) or

B8ZS (ETS = 1) code word is detected independent of whether

the receive HDB3/B8ZS mode (CCR4.6) is enabled. Will be

cleared when read. Useful for automatically setting the line

coding.

RCLC

(latched)

RIR1.4

Receive Carrier Loss Clear. Set when the RCL alarm has met

the clear criteria defined in Table 7-1. Will be cleared when

read.

RUA1C

(latched)

RIR1.3

Receive Unframed All Ones Clear. Set when the unframed all

ones signal is no longer detected. Will be cleared when read.

See Table 7-1.

JALT

(latched)

RIR1.2

Jitter Attenuator Limit Trip. Set when the jitter attenuator

FIFO reaches to within 4 bits of its useful limit. Will be cleared

when read. Useful for debugging jitter attenuation operation.

N/A

RIR1.1

Not Assigned. Could be any value when read.

N/A

RIR1.0

Not Assigned. Could be any value when read.

DS2148 датащи(PDF) 38 Page - Dallas Semiconductor

DS2148 датащи(HTML) 38 Page - Dallas Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75

датащи скачать

ссылки URL