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PC97338VLJ датащи(PDF) 147 Page - National Semiconductor (TI) |
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PC97338VLJ датащи(HTML) 147 Page - National Semiconductor (TI) |
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147 / 221 page ![]() 147 www.national.com The UART mode is the default mode of operation af- ter power up or reset. In fact, after reset, the module enters the 16450 compatibility mode. In addition to the 16450 and 16550 compatibility modes, an extend- ed mode of operation is also available. When the ex- tended mode is selected, the module architecture changes slightly and a variety of additional features are made available. The interrupt sources are no longer prioritized, and an auxiliary status and control register replaces the scratch pad register. The addi- tional features include: transmitter FIFO thresholding, DMA capability, and interrupts on transmitter empty and DMA event. The clock for both transmit and receive channels is provided by an internal baud generator that divides its input clock by any divisor value from 1 to 2 16 –1. The output clock frequency of the baud generator must be programmed to be sixteen times the baud rate value. The baud generator input clock is derived from a 24 MHz clock through a programmable prescaler. The prescaler value is determined by the PRESL bits in the EXCR2 register. Its default value is 13. This al- lows all the standard baud rates, up to 115.2 kbaud to be obtained. Smaller prescaler values will allow baud rates up to 921.6 kbaud (standard) and 1.5 Mbaud (non standard). Before operation can begin, both the communications format and baud rate must be programmed by the software. The communications format is programmed by loading a control byte into the LCR register, while the baud rate is selected by loading an appropriate value into the baud generator divisor register. The software can read the status of the module at any time during operation. The status information includes FULL/EMPTY state for both transmit and receive channels, and any other condition detected on the re- ceived data stream, like a parity error, framing error, data overrun, or break event. 5.4 SHARP-IR MODE This mode supports bi-directional data communica- tion with a remote module using infrared radiation as the transmission medium. Sharp-IR uses Digital Am- plitude Shift Keying (DASK) and allows serial commu- nication at baud rates up to 38.4 kbaud. The format of the serial data is similar to the UART data format. Each data word is sent serially beginning with a zero value start bit, an optional parity bit, and ending with at least one stop bit with a binary value of one. A zero is signalled by sending a 500 kHz continuous pulse train of infrared radiation. A one is signaled by the ab- sence of any infrared signal. The PC97338 can per- form the modulation and demodulation operations internally, or it can rely on the external optical module to perform them. Operation in Sharp-IR is similar to the operation in UART mode. The main difference being that data transfer operations are normally performed in half du- plex fashion, and the modem control and status sig- nals are not used. Selection of the Sharp-IR mode is controlled by the MDSL bits in the MCR register when the module is in extended mode, or by the IR_SL bits in the IRCR1 register when the module is in non-ex- tended mode. This prevents legacy software, running in non-extended mode, from spuriously switching the module to UART mode, when the software writes to the MCR register. 5.5 IrDA 1.0 SIR MODE This is the first operational mode that has been de- fined by the IrDA committee and, similarly to Sharp- IR, it also supports bi-directional data communication with a remote module using infrared radiation as the transmission medium. IrDA 1.0 SIR allows serial com- munication at baud rates up to 115.2 kbaud. The for- mat of the serial data is similar to the UART data format. Each data word is sent serially beginning with a zero value start bit, followed by 8 data bits, and end- ing with at least one stop bit with a binary value of one. A zero is signaled by sending a single infrared pulse. A one is signaled by not sending any pulse. The width of each pulse can be either 1.6 µs or 3/16ths of a sin- gle bit time. (1.6 µs equals 3/16ths of a bit time at 115.2 kbaud). This way, each word begins with a pulse for the start bit. Operation in IrDA 1.0 SIR is similar to the operation in UART mode. The main difference being that data transfer operations are normally performed in half du- plex fashion, and the modem control and status sig- nals are not used. Selection of the IrDA 1.0 SIR mode is controlled by the MDSL bits in the MCR register when the module is in extended mode, or by the IR_SL bits in the IRCR1 register when the module is in non-extended mode. This prevents legacy soft- ware, running in non-extended mode, from spuriously switching the module to UART mode, when the soft- ware writes to the MCR register. 5.6 IrDA 1.1 MIR AND FIR MODES The PC97338 supports both IrDA 1.1 MIR and FIR modes, with data rates of 576 kbps, 1.152 Mbps and 4.0 Mbps. Details on the frame format, encoding schemes, CRC sequences, etc. are provided in the appropriate IrDA documents. The MIR transmitter front-end section performs bit stuffing on the out- bound data stream and places the Start and Stop flags at the beginning and end of MIR frames. The MIR receiver front-end section removes flags and “de- stuffs” the inbound bit stream, and checks for abort conditions. |
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