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PC97338VLJ датащи(PDF) 47 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
номер детали PC97338VLJ
подробное описание детали  ACPI 1.0 and PC98/99 Compliant SuperI/O
PDF  221 Pages
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производитель  NSC [National Semiconductor (TI)]
домашняя страница  http://www.national.com
Logo NSC - National Semiconductor (TI)

PC97338VLJ датащи(HTML) 47 Page - National Semiconductor (TI)

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latch (e.g., 74LS175). Address 3F2h is used if the
FDC is located at the primary address (bit 5 of
FER = 0) and address 372h is used if the FDC is
located at the secondary address (bit 5 of FER =
1).
2.3.3
Function Address Register (FAR),
Index 01h
In Plug and Play mode, this register is ignored.
In Legacy mode, this register selects the ISA I/O ad-
dress range to which each peripheral function re-
sponds.
FIGURE 4. FAR Register Bitmap
Bits 1,0 - Parallel Port Address
These bits select the parallel port address as
shown in Table 11.
TABLE 11. Parallel Port Addresses
Bits 3,2 - SCC1 Address
These bits determine which ISA I/O address range
is associated with SCC1 as shown in Table 13.
TABLE 12. COM Port Selection for SCC1
Bits 5,4 - SCC2 Address
These bits determine which ISA I/O address range
is associated with SCC2 as shown in Table 12.
TABLE 13. COM Port Selection for SCC2
Bits 7,6 - Select COM3 or COM4
These bits select the addresses that are used for
COM3 and COM4 as shown in Table 14.
TABLE 14. Address Selection for COM3 and
COM4
2.3.4
Power and Test Register (PTR),
Index 02h
This register determines the power-down method
used and whether hardware power-down is enabled,
and provides a bit for software power down of all en-
abled functions. It selects whether IRQ7 or IRQ5 is
associated with LPT2. It puts the enabled SCCs into
their test mode. Independent of this register the floppy
disk controller can enter low power mode via the
MODE command or the Data Rate Select (DSR) reg-
ister.
FAR
Parallel Port
Address
AT
Interrupt
Bit 1 Bit 0
0
0
LPT2
(378-37F)
IRQ5 a
a. The interrupt assigned to this address can be
changed to IRQ7 by setting bit 3 of the Power
and Test Register (PTR)
0
1
LPT1
(3BC-3BE)
IRQ7
1
0
LPT3
(278-27F)
IRQ5
1
1
Reserved
TRI-STATE
(CTR4=0)
76
543
21
0
Register (FAR)
Reset
Required
Function Address
Index 01h
0
0
0
0
0
x
0
0
Parallel Port Address
SCC1 Address
SCC2 Address
Select COM3 or COM4
FAR
SCC1
Bit 3
Bit 2
COM Port #
0(default)
0(default) COM1
(3F8-F)
01
COM2
(2F8-F)
1
0
COM3
(See Table 14.)
1
1
COM4
(See Table 14.)
FAR
SCC2
Bit 5
Bit 4
COM#
0
0
COM1
(3F8-F)
0(default) 1(default) COM2
(2F8-F)
1
0
COM3
(See Table 14.)
1
1
COM4
(See Table 14.)
Bit 7
Bit 6
COM3 IRQ4
COM4 IRQ3
0
0
3E8-Fh
2E8-Fh
0
1
338-Fh
238-Fh
1
0
2E8-Fh
2E0-7h
1
1
220-7h
228-Fh



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