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PC97338VLJ датащи(PDF) 25 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
номер детали PC97338VLJ
подробное описание детали  ACPI 1.0 and PC98/99 Compliant SuperI/O
PDF  221 Pages
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производитель  NSC [National Semiconductor (TI)]
домашняя страница  http://www.national.com
Logo NSC - National Semiconductor (TI)

PC97338VLJ датащи(HTML) 25 Page - National Semiconductor (TI)

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DCD1
DCD2
77
69
75
67
I
Group 1
UART Data Carrier Detect signals 1 and 2. When low, this signal
indicates that the modem or data transfer device has detected the
data carrier.
The DCD2,1 signals are modem status input signals whose
condition can be tested by reading bit 7 (DCD) of the Modem
Status Register (MSR) for the appropriate serial channel. Bit 7 is
the complement of the DCD signal. Bit 3 (DDCD) of the MSR
indicates whether the DCD input signal has changed state since the
previous reading of the MSR.
If modem status interrupts are enabled, an interrupt is generated
whenever the DDCD bit of the MSR is set to 1.
DCD2 is multiplexed with A15. When DCD2 is not selected, it is
masked to 1.
DENSEL
(Normal
Mode)
48
46
O
Group 10
Density Select. Indicates that a high density FDC data rate (500
Kbps, 1 Mbps or 2 Mbps) or a low density data rate (250 Kbps or
300 Kbps) is selected. The polarity of DENSEL is controlled via bit
6 of the ASC register. The default is active high for high density.
DENSEL is also programmable via the MODE command.
DENSEL is multiplexed with ADRATE1.
(PPM
Mode)
78
76
O
Group 10
Density Select. This pin provides an additional Density Select
signal in PPM mode when PNF = 0.
DENSEL is multiplexed with AFD, DSTRB. See Table 72 for more
information.
DIR
(Normal
Mode)
41
39
O
Group 10
Direction. This FDC output signal determines the direction of the
Floppy Disk Drive (FDD) head movement (active = step in, inactive
= step out) during a seek operation. During read or write
operations, DIR is inactive.
(PPM
Mode)
80
78
O
Group 10
Direction. This FDC pin provides an additional direction signal in
PPM Mode when PNF = 0. DIR is multiplexed with INIT. See Table
72 for more information.
DR0
DR1
(Normal
Mode)
44
45
42
43
O
Group 10
FDC Drive Select signals 0 and 1. These FDC signals are
decoded drive select output signals controlled by Digital Output
Register bits D0 and D1.
These signals are gated with DOR bits 7 through 4. These are
active low output signals. They are encoded with information to
control four FDDs when bit 4 of the Function Enable Register (FER)
is set. DR0,1 are exchanged only via the TDR register. (Bit 4 of the
FCR register is reserved.)
DR1 is multiplexed with PD.
DR1
(PPM
Mode)
85
83
O
Group 10
FDC Drive Select 1. This signal provides an additional drive select
signal in PPM mode when PNF = 0. It is drive select 1 when bit 4
of FCR is 0. It is drive select 0 when bit 4 of FCR is 1. This signal
is active low. DR1 is multiplexed with ACK. See Table 72 for more
information.
DR23
49
47
O
Group 10
Drive 2 or 3. This FDC signal is asserted when either drive 2 or
drive 3 is accessed (except during logical drive exchange, see bit 3
of TDR). This pin is configured when bits 7, 6 of SIRQ3 are 01.
DR23 is multiplexed with IRSL0, DRV2, SIRQI3 and PNF.
Symbol
PQFP
Pin
TQFP
Pin
I/O and
Group #
Function



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