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PC97338VLJ датащи(PDF) 27 Page - National Semiconductor (TI) |
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PC97338VLJ датащи(HTML) 27 Page - National Semiconductor (TI) |
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27 / 221 page ![]() 27 www.national.com DTR1 DTR2 71 63 69 61 O Group 7 Data Terminal Ready signals 1 and 2. When low, these UART output signals indicate to the appropriate modem or data transfer device that the UART is ready to establish a communications link. The DTR signal can be set to active low by programming bit 0 (DTR) of the Modem Control Register (MCR) to a high level. A Master Reset (MR) operation sets this signal to its inactive (high) state. Loop mode operation holds this signal to its inactive state. DTR2 is multiplexed with A12 (and BOUT2 in PC97338 only). ERR 79 77 I Group 3 Error. This parallel port input signal is set low by the external printer when it has detected an error. This pin is internally connected to a nominal 25 K Ω pull-up resistor. ERR is multiplexed with HDSEL. See Table 72 for more information. HDSEL (Normal Mode) 34 32 O Group 10 Head Select. This FDC output signal determines which side of the FDD is accessed. Active (low) selects side 1, inactive (high) selects side 0. (PPM Mode) 79 77 O Group 10 Head Select. This signal provides an additional head select signal in PPM mode when PNF = 0. HDSEL is multiplexed with ERR. See Table 72 for more information. ID2 ID1 ID0 43 or 49 8 68 41 or 47 6 66 I Group 1 Identification – These ID signals identify the infrared transceiver for Plug and Play support. These pins are read after reset. These pins are available only in PC97338. ID2 is multiplexed with MTR1, IDLE and IRSL2 or with DRV2, PNF, DR23, SIRQI3 and IRSL2. ID1 is multiplexed with IRSL1. ID0 is multiplexed with DSR2, IRQ12, IRRX2 and IRSL0. IDLE 43 41 O Group 10 Idle. This FDC output pin is used for an IDLE output signal when bit 4 of PMC is 1. It is used for MTR1 when bit 4 of PMC is 0. IDLE indicates that the FDC is in the Idle state and can be powered down. Whenever the FDC is in the Idle state, or whenever the FDC is in a power-down state, the pin is active high. IDLE is multiplexed with MTR1 and IRSL2. INDEX (Normal Mode) 47 45 I Group 4 Index. This input signal indicates the beginning of an FDD track. (PPM Mode) 94 92 I Group 4 FDC Index. This signal provides an additional index signal in PPM mode when PNF = 0.INDEX is multiplexed with PD0. See Table 72 for more information. INIT 80 78 O Group 11 Parallel Port Initialize. When this signal is low, it causes the printer to be initialized. This signal is in a TRI-STATE condition 10 nsec after a 1 is loaded into the corresponding Control Register bit. The system should pull this pin high using a 4.7 K Ω resistor. INIT is multiplexed with DIR. IOCHRDY 53 51 O Group 13 I/O Channel Ready. This is the I/O Channel Ready open-drain output signal. When IOCHRDY is driven low, the EPP extends the host cycle. Symbol PQFP Pin TQFP Pin I/O and Group # Function |
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