PC97338VLJ datasheet(91/221 Pages) NSC

91 / 221 page

www.national.com

1 - Control mark detected.

Bit 7 - Not Used

This bit is not used and is always 0.

3.5.4

Result Phase Status Register 3

(ST3)

FIGURE 57. ST3 Result Phase Register

Bits 1,0 - Logical Drive Selected

These two binary encoded bits indicate the logical

drive selected at the end of the command phase.

The value of these bits is the same as bits 1,0 of

the SR0 register, described on page 88.

00 - Drive 0 selected.

01 - Drive 1 selected.

10 - If four drives are supported, or drives 2 and 0

are exchanged, drive 2 is selected.

11 - If four drives are supported, drive 3 is select-

ed.

Bit 2 - Head Selected

This bit indicates which side of the Floppy Disk

Drive (FDD) is selected. It reflects the status of the

HDSEL signal at the end of the command phase.

The value of this bit is the same as bit 2 of the SR0

0 - Side 0 is selected.

1 - Side 1 is selected.

Bit 3 - Not Used

This bit is not used and is always 1.

Bit 4 - Track 0

This bit Indicates whether or not the head of the

selected drive is at track 0.

0 - The head of the selected drive is not at track

0, i.e., TRK0 is not active.

1 - The head of the selected drive is at track 0,

i.e., TRK0 is active.

Bit 5 - Not Used

This bit is not used and is always 1.

Bit 6 - Drive Write Protected

This bit indicates whether or not the selected drive

is write protected, i.e., the WP signal is active

(low).

0 - Selected drive is not write protected, i.e., WP

is not active.

1 - Selected drive is write protected, i.e., WP is

active.

Bit 7 - Not Used

This bit is not used and is always 0.

3.6

THE FDC COMMAND SET

The first command byte for each command in the

FDC command set is the opcode byte. The FDC uses

this byte to determine how many command bytes to

expect.

If an invalid command byte is issued to the controller,

it immediately enters the result phase and the status

is 80 (hex), signifying an invalid command.

Table 43 shows the FDC commands in alphabetical

order with the opcode, i.e., the first command byte, for

each.

In this table:

• MT is a multi-track enable bit (See “Bit 7 - Multi-

Track (MT)” on page 106.)

• MFM is a modified frequency modulation param-

eter (See “Bit 6 - Modified Frequency Modulation

(MFM)” on page 96.)

• SK is a skip control bit. (See “Bit 5 - Skip Control

(SK)” on page 105.)

Section 3.6.1 explains some symbols and abbrevia-

tions you will encounter in the descriptions of the com-

mands.

All phases of each command are described in detail,

starting with Section 3.6.2, with bitmaps of each byte

in each phase.

Only named bits and fields are described in detail.

When a bitmap shows a value (0 or 1) for a bit, that bit

must have that value and is not described.

321

Reset

Required

Result Phase Status

Not Used

Track 0

Drive Write Protected

Head Selected (Command Phase)

Logical Drive Selected

(Command Phase)

PC97338VLJ датащи(PDF) 91 Page - National Semiconductor (TI)

PC97338VLJ датащи(HTML) 91 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL