PC97338VLJ datasheet(61/221 Pages) NSC

61 / 221 page

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FIGURE 26. PBAH Register Bitmap

2.3.25 SCC1 Base Address Low Byte

This register holds the low address bits of SCC1’s

base address.

In Legacy mode, this register is ignored and the base

address of SCC1 is determined by bits 3 and 2, and

bits 7 and 6 of the FAR register.

This register may be modified only when SCC1 is dis-

abled. Undefined value when out of reset.

It is the software’s responsibility to configure all devic-

es so there will be no conflicts.

FIGURE 27. S1BAL Register Bitmap

2.3.26 SCC1 Base Address High Byte

This register holds the high address bits of SCC1’s

base address.

In Legacy mode, this register is ignored and the base

address of SCC1 is determined by bits 3 and 2, and

bits 7 and 6 of the FAR register.

This register may be modified only when SCC1 is dis-

abled. Undefined value when out of reset.

It is the software’s responsibility to configure all devic-

es so as to avoid conflicts.

FIGURE 28. S1BAH Register Bitmap

2.3.27 SCC2 Base Address Low Byte

This register holds the low address bits of SCC2’s

base address.

In Legacy mode, this register is ignored and the base

address of SCC2 is determined by bits 7 through 4 of

the FAR register.

This register may be modified only when SCC2 is dis-

abled. Undefined value when out of reset.

It is the software’s responsibility to configure all devic-

es so as to avoid conflicts.

FIGURE 29. S2BAL Register Bitmap

Reserved

A10

A11

A12

A13

A14

A15

Reserved

A10

Reserved

Address Length

432

Reset

Required

11 Bits

16 bits

CFG0 = 1

CFG0 = 0

(PBAH)

Parallel Port Base Address

Index 43h

High Byte Register

543

Reset

Required

Reserved

(S1BAL)

SCC1 Base Address

Index 44h

Low Byte Register

Reserved

A10

A11

A12

A13

A14

A15

Reserved

A10

Reserved

Address Length

654

Reset

Required

11 Bits

16 bits

CFG0 = 1

CFG0 = 0

(S1BAH)

SCC1 Base Address

Index 45h

High Byte Register

543

Reset

Required

Reserved

(S2BAL)

SCC2 Base Address

Index 46h

Low Byte Register

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