PC97307 datasheet(142/218 Pages) NSC

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142

UART1 and UART2 (with IR) (Logical Devices 5 and 6)

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Interrupt Enable Register (IER), in the Non-Extended

Modes (UART, SIR and Sharp-IR)

Upon reset, the IER supports UART, SIR and Sharp-IR in

the Non-Extended modes. Figure 7-5 shows the bitmap of

the Interrupt Enable Register in these modes.

FIGURE 7-5. IER Register Bitmap, Non-Extended

Mode

Bit 0 - Receiver High-Data-Level Interrupt Enable

(RXHDL_IE)

Setting this bit enables interrupts on Receiver High-

Data-Level, or RX_FIFO Time-Out events (EIR Bits 3-0

are 0100 or 1100. See “Non-Extended Mode Interrupt

Priorities” on page 144).

0 - Disable Receiver High-Data-Level and RX_FIFO

Time-Out interrupts (Default).

1 - Enable Receiver High-Data-Level and RX_FIFO

Time-Out interrupts.

Bit 1 - Transmitter Low-Data-Level Interrupt Enable

(TXLDL_IE)

Setting this bit enables interrupts on Transmitter Low

Data-Level-events (EIR Bits 3-0 are 0010. See “Non-

Extended Mode Interrupt Priorities” on page 144).

0 - Disable Transmitter Low-Data-Level Interrupts (De-

fault).

1 - Enable Transmitter Low-Data-Level Interrupts.

Bit 2 - Link Status Interrupt Enable (LS_IE)

Setting this bit enables interrupts on Link Status events.

(EIR Bits 3-0 are 0110. See “Non-Extended Mode Inter-

rupt Priorities” on page 144).

0 - Disable Link Status Interrupts (LS_EV) (Default).

1 - Enable Link Status Interrupts (LS_EV).

Bit 3 - Modem Status Interrupt Enable (MS_IE)

Setting this bit enables the interrupts on Modem Status

events. (EIR Bits 3-0 are 0000. See See Table 7-3 on

page 144).

0 - Disable Modem Status Interrupts (MS_EV) (De-

fault).

1 - Enable Modem Status Interrupts (MS_EV).

Bits 7-4 - Reserved

These bits are reserved.

76543210

Reset

Required

MS_IE

Reserved

Interrupt Enable

RXHDL_IE

TXLDL_IE

LS_IE

Bank 0,

IER in Non-Extended Modes

Offset 01h

Reserved

Interrupt Enable Register (IER), in the Extended Modes

of UART, Sharp-IR and SIR

Figure 7-6 shows the bitmap of the Interrupt Enable Regis-

ter in these modes.

FIGURE 7-6. IER Register Bitmap, Extended Modes of

UART and Sharp-IR

Bit 0 - Receiver High-Data-Level Interrupt Enable

(RXHDL_IE)

Setting this bit enables interrupts when the RX_FIFO is

equal to or above the RX_FIFO threshold level, or an

RX_FIFO time out occurs.

0 - Disable Receiver Data Ready interrupt. (Default)

1 - Enable Receiver Data Ready interrupt.

Bit 1 - Transmitter Low-Data-Level Interrupt Enable

(TXLDL_IE)

Setting this bit enables interrupts when the TX_FIFO is

below the threshold level or the Transmitter Holding

0 - Disable Transmitter Low-Data-Level Interrupts (De-

fault).

1 - Enable Transmitter Low-Data-Level Interrupts.

Bit 2 - Link Status Interrupt Enable (LS_IE)

Setting this bit enables interrupts on Link Status events.

0 - Disable Link Status Interrupts (LS_EV) (Default)

1 - Enable Link Status Interrupts (LS_EV).

Bit 3 - Modem Status Interrupt Enable (MS_IE)

Setting this bit enables the interrupts on Modem Status

events.

0 - Disable Modem Status Interrupts (MS_EV) (De-

fault)

1 - Enable Modem Status Interrupts (MS_EV).

Bit 4 - DMA Interrupt Enable (DMA_IE)

Setting this bit enables the interrupt on terminal count

when the DMA is enabled.

0 - Disable DMA terminal count interrupt (Default)

1 - Enable DMA terminal count interrupt.

76543210

Reset

Required

MS_IE

DMA_IE

TXEMP_IE

Reserved

Interrupt Enable

RXHDL_IE

TXLDL_IE

LS_IE

Bank 0,

Extended Mode of UART, Sharp-IR and SIR

Offset 01h

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