PC87306 datasheet(29/110 Pages) NSC

29 / 110 page

30 FDC Register Description (Continued)

DMA Enable

This bit has two modes of operation

PC-AT mode

Writinga1to this bit enables the

FDRQ FDACK TC and IRQ6 pins Writinga0to

this bit disables the FDACK and TC pins and TRI-

STATE the FDRQ and the IRQ6 pins This bit is a 0

after a reset when in these modes

PS2 mode

This bit is reserved and the FDRQ

FDACK TC and IRQ6 pins are always enabled Dur-

ing a reset the FDRQ FDACK TC and IRQ6 lines

remain enabled and D3 is 0

Reset Controller

Writinga0to this bit resets the

controller It remains in the reset condition until a 1

is written to this bit A software reset does not affect

the DSR CCR and other bits of the DOR A soft-

ware reset affects the Configure and Mode com-

mand bits (see Section 40 FDC Command Set De-

scription) The minimum time that this bit must be

low is 100 ns Thus toggling the Reset Controller bit

during consecutive writes to the DOR is an accept-

able method of issuing a software reset

D1 0

Drive Select

These two bits are binary encoded for

the four drive selects DR0 – DR3 so that only one

drive select output is active at a time (See bit 4 of

FCR for further information)

It is common programming practice to enable both the mo-

tor enable and drive select outputs for a particular drive

Table 3-2 shows the DOR values to enable each of the four

drives

TABLE 3-2 Drive Enable Values

Drive

DOR Value

1Ch

12D

24E

38F

Note

The MTR3 MTR2 DRV3 DRV2 pins are only available in four-drive

mode (bit 4 of FER is 1) and require external logic

314 Tape Drive Register (TDR)

ReadWrite

The TDR register is the Tape Drive Register and the floppy

disk controller media and drive type register The register

has three modes of operation (see Table 3-3)

PC-AT Compatible mode

The register is used to assign a

particular drive number to the tape drive support mode of

the data separator All other logical drives can be assigned

as floppy drive support Bits 2 – 7 are TRI-STATE during

read

Automatic Media Sense mode

Bits 5 – 7 are implemented

in addition to the bits of the Compatible PC-AT TDR mode

Bits 2 – 4 are reserved

Enhanced mode

This is the PS2 TDR mode It uses all

the register’s bits for operation with PS2 floppy drives

The use of the TDR bits for each of these modes is shown

in Table 3-3

Extra Density

When bit 5 is 0 this media id bit is

used with bit 6 to indicate the type of media current-

ly in the active floppy drive If bit 5 is 1 it is invalid

This bit holds MSEN1 pin value See Table 3-4 for

details regarding bits 5 – 7

High Density

When bit 5 is 0 this media id bit is

used with bit 7 to indicate the type of media current-

ly in the active floppy drive If bit 5 is 1 it is invalid

This bit holds MSEN0 pin value See Table 3-4 for

details regarding bits 5 – 7

TABLE 3-3 TDR Operation Modes

Mode

FCR

ASC

Bit

Bit 0

Bit 2

PC-AT Compatible

DESC

TAPE

SEL 1

SEL 0

RESET

COND

Automatic Media Sense

DESC

VALID

TAPE

DATA

SEL 1

SEL 0

RESET

COND

Enhanced

DESC

VALID

SWP1

SWP0

TAPE

DATA

SEL 1

SEL 0

RESET

COND

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