VT8231 datasheet(104/132 Pages) ETC

104 / 132 page

VT8231

Preliminary Revision 0.8 October 29, 1999

-98-

Power Management I/O-Space Registers

7HFKQRORJLHV ,QF

:H &RQQHFW

I/O Offset 33-30 - Primary Activity Detect Status.......RWC

These bits correspond to the Primary Activity Detect Enable

bits in offset 37-34. All bits default to 0, are set by hardware

only, and may only be cleared by writing 1s to the desired bit.

31-11 Reserved

..........................................always read 0

Audio Access Status .............................. (AUD_STS)

Set if Audio is accessed.

Keyboard Controller Access Status..... (KBC_STS)

Set if the KBC is accessed via I/O port 60h.

VGA Access Status................................ (VGA_STS)

Set if the VGA port is accessed via I/O ports 3B0-

3DFh or memory space A0000-BFFFFh.

Parallel Port Access Status.................... (LPT_STS)

Set if the parallel port is accessed via I/O ports 278-

27Fh or 378-37Fh (LPT2 or LPT1).

Serial Port B Access Status .............. (COMB_STS)

Set if the serial port is accessed via I/O ports 2F8-

2FFh or 2E8-2Efh (COM2 and COM4 respectively).

Serial Port A Access Status .............. (COMA_STS)

Set if the serial port is accessed via I/O ports 3F8-

3FFh or 3E8-3EFh (COM1 and COM3, respectively).

Floppy Access Status..............................(FDC_STS)

Set if the floppy controller is accessed via I/O ports

3F0-3F5h or 3F7h.

Secondary IDE Access Status...............(SIDE_STS)

Set if the IDE controller is accessed via I/O ports

170-177h or 376h.

Primary IDE Access Status ................. (PIDE_STS)

Set if the IDE controller is accessed via I/O ports

1F0-1F7h or 3F6h.

Primary Interrupt Activity Status ...... (PIRQ_STS)

Set on the occurrence of a primary interrupt (enabled

via the "Primary Interrupt Channel" register at

Function 4 PCI configuration register offset 44h).

PCI Master Access Status .................... (DRQ_STS)

Set on the occurrence of PCI master activity.

Note: The bits above correspond to the bits of the Primary

Activity Detect Enable register at offset 34 (see right hand

column of this page): if the corresponding bit is set in that

to be set (bit-0 of the Global Status register at offset 28).

Setting of PACT_STS may be set up to enable a "Primary

Activity Event": an SMI will be generated if PACT_EN is set

(bit-0 of the Global Enable register at offset 2Ah) and/or the

GP0 timer will be reloaded if the "GP0 Timer Reload on

Primary Activity" bit is set (bit-0 of the GP Timer Reload

Enable register at offset 38 on this page).

Note: Bits 2-9 above also correspond to bits of the GP Timer

Reload Enable register (see offset 38 on next page): If bits are

set in that register, setting a corresponding bit in this register

will cause the GP1 timer to be reloaded.

I/O Offset 37-34 - Primary Activity Detect Enable........ RW

These bits correspond to the Primary Activity Detect Status

bits in offset 33-30. Setting of any of these bits also sets the

PACT_STS bit (bit-0 of offset 28) which causes the GP0 timer

to be reloaded (if PACT_GP0_EN is set) or generates an SMI

(if PACT_EN is set).

31-11 Reserved

......................................... always read 0

SMI on Audio Status .............................. (KBC_EN)

Don't set PACT_STS if AUD_STS is set .... def

Set PACT_STS if AUD_STS is set

SMI on Keyboard Controller Status..... (KBC_EN)

Don't set PACT_STS if KBC_STS is set..... def

Set PACT_STS if KBC_STS is set

SMI on VGA Status................................ (VGA_EN)

Don't set PACT_STS if VGA_STS is set .... def

Set PACT_STS if VGA_STS is set

SMI on Parallel Port Status.................... (LPT_EN)

Don't set PACT_STS if LPT_STS is set...... def

Set PACT_STS if LPT_STS is set

SMI on Serial Port B Status ...............(COMB_EN)

Don't set PACT_STS if COMB_STS is set . def

Set PACT_STS if COMB_STS is set

SMI on Serial Port A Status .............. (COMA_EN)

Don't set PACT_STS if COMA_STS is set . def

Set PACT_STS if COMA_STS is set

SMI on Floppy Status .............................(FDC_EN)

Don't set PACT_STS if FDC_STS is set ..... def

Set PACT_STS if FDC_STS is set

SMI on Secondary IDE Status...............(SIDE_EN)

Don't set PACT_STS if SIDE_STS is set .... def

Set PACT_STS if SIDE_STS is set

SMI on PrimaryIDE Status ...................(PIDE_EN)

Don't set PACT_STS if PIDE_STS is set .... def

Set PACT_STS if PIDE_STS is set

SMI on Primary INTR Status .............. (PIRQ_EN)

Don't set PACT_STS if PIRQ_STS is set.... def

Set PACT_STS if PIRQ_STS is set

SMI on PCI Master Status .................... (DRQ_EN)

Don't set PACT_STS if DRQ_STS is set .... def

Set PACT_STS if DRQ_STS is set

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