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AD6634BC/PCB датащи(PDF) 40 Page - Analog Devices |
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AD6634BC/PCB датащи(HTML) 40 Page - Analog Devices |
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40 / 52 page ![]() REV. 0 –40– AD6634 Bits 9–5 are the actual scale value used when the Level Indicator, LI pin associated with this channel is active. Bits 4–0 are the actual scale value used when the Level Indicator, LI pin associated with this channel is active. 0x93: Reserved (must be written Low). 0x94: CIC5 Decimation – 1 (MCIC5 – 1) This register is used to set the decimation in the CIC5 filter. The value written to this register is the decimation minus one. Although this is an 8-bit register, the decimation is usually lim- ited to between 1 and 32. Decimations higher than 32 would require more scaling than the CIC5 is capable of. 0x95: CIC5 Scale The CIC5 scale factor is used to compensate for the growth of the CIC5 filter. Consult the CIC5 section for details. 0x96: Reserved (must be written low). 0xA0: RCF Decimation – 1 (MRCF – 1) This register is used to set the decimation of the RCF stage. The value written is the decimation minus one. Although this is an 8-bit register that allows decimation up to 256, for most filtering scenarios the decimation should be limited between 1 and 32. Higher decimations are allowed but the alias protection of the RCF may not be acceptable for some applications. 0xA1: RCF Decimation Phase (PRCF) This register allows any one of the MRCF phases of the filter to be used and can be adjusted dynamically. This phase is updated each time a filter is started. When a channel is synchronized, it will retain the phase setting chosen here. This can be used as part of a timing recovery loop with an external processor or can allow multiple RCFs to work together while using a single RCF pair. The RCF section should be consulted for further details. 0xA2: RCF Number of Taps – 1 (NTAPS – 1) The number of taps for the RCF filter minus one is written here. 0xA3: RCF Coefficient Offset (CORCF) This register is used to specify which section of the 256-word coefficient memory is used for a filter. It can be used to select between multiple filters that are loaded into memory and refer- enced by this pointer. This register is shadowed and the filter pointer is updated every time a new filter is started. This allows the coefficient offset to be written even while a filter is being computed with disturbing operation. The next sample that comes out of the RCF will be with the new filter. 0xA4: RCF Control Register The RCF control register is an 11-bit register that controls the general features of the RCF as well as the output formatting. The bits of this register and their functions are described below. Bit 10 bypasses the RCF filter and sends the CIC5 output data to the BIST-I and BIST-Q registers. The 16 MSBs of the CIC5 data can be accessed from this register if Bit 9 of the RCF Control Register 2 at Channel Address 0xA9 is set. Bit 9 of this register controls the source of the input data to the RCF. If this bit is 0, the RCF processes the output data of its own channel. If this bit is 1, it processes the data from the CIC5 of another channel. The CIC5 that the RCF is connected to when this bit is 1 is shown in the Table XII. These can be used to allow multiple RCFs to be used together to process wider bandwidth channels. See the Multiprocessing section for further details. Table XII. RCF Input Configurations Channel RCF Input Source When Bit 9 is 1 01 10 21 31 Bit 8 is used as an extra address to allow a second block of 128 words of CMEM to be addressed by the channel addresses at 0x00–0x7F. If this bit is 0, the first 128 words are written; and if this bit is 1, a second 128 words is written. This bit is only used to program the coefficient memory. It is not used in any way by the processing and filters longer than 128 taps can be performed. Bit 7 is used to help control the output formatting of the AD6634s RCF data. This bit is only used when the 8 + 4 or 12 + 4 floating- point modes are chosen. These modes are enabled by Bits 5 and 4 of this register below. When this bit is 0, the I and Q output exponents are determined separately based on their individual magnitudes. When this bit is 1, the I and Q data is a complex floating-point number where I and Q use a single exponent that is determined based on the maximum magnitude of I or Q. Bit 6 is used to force the Output Scale Factor in Bits 3–0 of this register to be used to scale the data even when one of the floating- point output modes is used. If the number was too large to represent with the output scale chosen, the mantissas of the Iand Q data clip and do not overflow. Bits 5 and 4 choose the output formatting option used by the RCF data. The options are defined in the Table XIII and are discussed further in the Output Format section. Table XIII. Output Formats Bit Values Output Option 1x 12-Bit Mantissa and 4-Bit Exponent (12 + 4) 01 8-Bit Mantissa and 4-Bit Exponent (8 + 4) 00 Fixed-Point Mode Bits 3–0 of this register represent the Output Scale Factor of the RCF. It is used to scale the data when the output format is in fixed-point mode or when the Force Exponent bit is high. 0xA5: BIST Register for I This register serves two purposes. The first is to allow the complete functionality of the I data path in the channel to be tested in the system. The BIST section of the data sheet should be consulted for further details. The second function is to provide access to the I output data through the microport. To accomplish this, the Map RCF data to BIST bit in the RCF Control register 2, 0xA9, should be set high. Sixteen bits of I data can then be read through the microport in either the 8 + 4, 12 + 4, 12-bit linear, or 16-bit linear output modes. This data may come from either the formatted RCF output or the CIC5 output. 0xA6: BIST Register for Q This register serves two purposes. The first is to allow the complete functionality of Q data path in the channel to be tested in the system. The BIST section of the data sheet should be consulted for further details. The second function is to provide access to |
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