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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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TMS570LS1114 датащи(PDF) 85 Page - Texas Instruments |
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TMS570LS1114 датащи(HTML) 85 Page - Texas Instruments |
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85 / 169 page  TMS570LS1114 www.ti.com SPNS188B – OCTOBER 2012 – REVISED FEBRUARY 2015 Table 6-28. EMIF Asynchronous Memory Switching Characteristics(1)(2)(3) NO PARAMETER Value UNIT MIN NOM MAX Reads and Writes 1 td(TURNAROUND) Turnaround time (TA)*E - 4 (TA)*E (TA)*E + 3 ns Reads 3 tc(EMRCYCLE) EMIF read cycle time (EW = 0) (RS+RST+RH)* (RS+RST+RH)* (RS+RST+RH)* ns E -3 E E + 3 EMIF read cycle time (EW = 1) (RS+RST+RH+( (RS+RST+RH+( (RS+RST+RH+( ns EWC*16))*E -3 EWC*16))*E EWC*16))*E + 3 4 tsu(EMCEL-EMOEL) Output setup time, (RS)*E-6 (RS)*E (RS)*E+3 ns EMIF_nCS[4:2] low to EMIF_nOE low (SS = 0) Output setup time, -6 0 +3 ns EMIF_nCS[4:2] low to EMIF_nOE low (SS = 1) 5 th(EMOEH-EMCEH) Output hold time, EMIF_nOE (RH)*E -3 (RH)*E (RH)*E + 5 ns high to EMIF_nCS[4:2] high (SS = 0) Output hold time, EMIF_nOE -3 0 +5 ns high to EMIF_nCS[4:2] high (SS = 1) 6 tsu(EMBAV-EMOEL) Output setup time, (RS)*E-6 (RS)*E (RS)*E+3 ns EMIF_BA[1:0] valid to EMIF_nOE low 7 th(EMOEH-EMBAIV) Output hold time, EMIF_nOE (RH)*E-3 (RH)*E (RH)*E+5 ns high to EMIF_BA[1:0] invalid 8 tsu(EMAV-EMOEL) Output setup time, (RS)*E-6 (RS)*E (RS)*E+3 ns EMIF_ADDR[12:0] valid to EMIFnOE low 9 th(EMOEH-EMAIV) Output hold time, EMIF_nOE (RH)*E-3 (RH)*E (RH)*E+5 ns high to EMIF_ADDR[12:0] invalid 10 tw(EMOEL) EMIF_nOE active low width (EW (RST)*E-3 (RST)*E (RST)*E+3 ns = 0) EMIF_nOE active low width (EW (RST+(EWC*16 (RST+(EWC*16 (RST+(EWC*16 ns = 1) )) *E-3 ))*E )) *E+3 11 td(EMWAITH-EMOEH) Delay time from EMIF_nWAIT 3E+9 4E 4E+20 ns deasserted to EMIF_nOE high 29 tsu(EMDQMV-EMOEL) Output setup time, (RS)*E-6 (RS)*E (RS)*E+3 ns EMIF_nDQM[1:0] valid to EMIF_nOE low 30 th(EMOEH-EMDQMIV) Output hold time, EMIF_nOE (RH)*E-3 (RH)*E (RH)*E+5 ns high to EMIF_nDQM[1:0] invalid Writes 15 tc(EMWCYCLE) EMIF write cycle time (EW = 0) (WS+WST+WH (WS+WST+WH (WS+WST+WH ns )* E-3 )*E )* E+3 EMIF write cycle time (EW = 1) (WS+WST+WH (WS+WST+WH (WS+WST+WH ns +( EWC*16))*E +(E WC*16))*E +( EWC*16))*E -3 + 3 (1) TA = Turnaround, RS = Read setup, RST = Read strobe, RH = Read hold, WS = Write setup, WST = Write strobe, WH = Write hold, MEWC = Maximum external wait cycles. These parameters are programmed through the Asynchronous Bank and Asynchronous Wait Cycle Configuration Registers. These support the following ranges of values: TA[4–1], RS[16–1], RST[64–1], RH[8–1], WS[16–1], WST[64–1], WH[8–1], and MEWC[1–256]. See the TMS570LS12x/11x Technical Reference Manual (SPNU515) for more information. (2) E = EMIF_CLK period in ns. (3) EWC = external wait cycles determined by EMIF_nWAIT input signal. EWC supports the following range of values. EWC[256–1]. Note that the maximum wait time before timeout is specified by bit field MEWC in the Asynchronous Wait Cycle Configuration Register. See the TMS570LS12x/11x Technical Reference Manual (SPNU515) for more information. Copyright © 2012–2015, Texas Instruments Incorporated System Information and Electrical Specifications 85 Submit Documentation Feedback Product Folder Links: TMS570LS1114 |
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