TMS570LS1114 datasheet(48/169 Pages) TI1

48 / 169 page

VCCIO

VOH

VOL

Output

TMS570LS1114

SPNS188B – OCTOBER 2012 – REVISED FEBRUARY 2015

www.ti.com

Table 5-7. Switching Characteristics for Output Timings versus Load Capacitance ©L) (continued)

Parameter

MIN

MAX

Unit

Rise time, tr

2 mA-z low EMI pins

CL = 15 pF

(see Table 5-4)

CL = 50 pF

CL = 100 pF

CL = 150 pF

Fall time, tf

CL = 15 pF

CL = 50 pF

CL = 100 pF

CL = 150 pF

Rise time, tr

Selectable 8 mA / 2 mA-z

8 mA mode

CL = 15 pF

2.5

pins

CL = 50 pF

(see Table 5-4)

CL = 100 pF

7.2

CL = 150 pF

12.5

Fall time, tf

CL = 15 pF

2.5

CL = 50 pF

CL = 100 pF

7.2

CL = 150 pF

12.5

Rise time, tr

2 mA-z mode

CL = 15 pF

CL = 50 pF

CL = 100 pF

CL = 150 pF

Fall time, tf

CL = 15 pF

CL = 50 pF

CL = 100 pF

CL = 150 pF

Figure 5-3. CMOS-Level Outputs

Table 5-8. Timing Requirements for Outputs(1)

Parameter

MIN

MAX

UNIT

td(parallel_out)

Delay between low to high, or high to low transition of general-purpose output signals

that can be configured by an application in parallel, e.g. all signals in a GIOA port, or

all N2HET1 signals, etc.

(1)

This specification does not account for any output buffer drive strength differences or any external capacitive loading differences. Check

Table 5-4 for output buffer drive strength information on each signal.

Specifications

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