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TMS570LS1114 датащи(PDF) 6 Page - Texas Instruments |
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TMS570LS1114 датащи(HTML) 6 Page - Texas Instruments |
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6 / 169 page  TMS570LS1114 SPNS188B – OCTOBER 2012 – REVISED FEBRUARY 2015 www.ti.com 2 Revision History This data manual revision history highlights the technical changes made to the SPNS188A device-specific data manual addendum to make it an SPNS188B revision. Scope: Applicable updates to the Hercules™ TMS570 MCU device family, specifically relating to the TMS570LS1114 devices, which are now in the production data (PD) stage of development have been incorporated. Changes from September 1, 2013 to February 28, 2015 (from A Revision (September 2013) to B Revision) Page • Updated/Changed section title to "Device Overview" ........................................................................... 1 • Updated/changed the N2HET feature ............................................................................................. 1 • Added Table 1-1, Device Information .............................................................................................. 3 • Added Section 3, Device Comparison ............................................................................................. 8 • Updated/Changed section title to "Terminal Configuration and Functions" ................................................... 9 • Table 4-2 (PGE Enhanced High-End Timer Modules (N2HET)) Updated/Changed N2HET1 time input capture or output compare pin description .................................................................................................... 13 • Table 4-2 Updated/Changed N2HET2 time input capture or output compare pin description ............................ 14 • Table 4-5Updated/Changed the EPWM1SYNCI Signal Type from "Output" to "Input" .................................... 15 • Table 4-5Updated/Changed the EPWM1SYNCI pin description from "Output" to "Input" ................................. 15 • Table 4-15 (PGE Test and Debug Modules Interface): Updated/Changed TEST pin description ........................ 20 • Table 4-21 (ZWT Enhanced High-End Timer Modules (N2HET)) Updated/Changed N2HET1 time input capture or output compare pin description ................................................................................................ 24 • Table 4-21 Updated/Changed N2HET2 time input capture or output compare pin description .......................... 25 • Updated/Changed the EPWM1SYNCI pin description from "Output" to "Input" ............................................ 27 • Table 4-32 (External Memory Interface (EMIF)): Global: Deleted EMIF_RNW pin function. .............................. 32 • Table 4-35 (ZWT Test and Debug Modules Interface): Updated/Changed TEST pin description ....................... 35 • Table 4-37 Changed six BGA balls from NC to Reserved ..................................................................... 35 • Updated/Changed section title to "Specifications" ............................................................................. 41 • Moved Storage temperature range, Tstg back to Section 5.1, Absolute Maximum Ratings Over Operating Free- Air Temperature Range ............................................................................................................ 41 • Added Section 5.2, Handling Ratings (Automotive) ............................................................................ 41 • Added Section 5.3, Power-On-Hours (POH) .................................................................................... 41 • Moved Thermal Data section here. ............................................................................................... 45 • Section 5.9 (Thermal Resistance Characteristics): Updated/Changed title from "Thermal Data" to "Thermal Resistance Characteristics" ........................................................................................................ 45 • Added ΘJA test conditions and added ΨJT for PGE package.................................................................. 45 • Added ΘJA test conditions and added ΨJT for ZWT package.................................................................. 45 • Clarified impact of SPI2PC9 register on drive strength of SPI2SOMI pin .................................................. 47 • Changed the number of cycles of tv(RST) from 2252 to 2256................................................................... 54 • Section 6.9.1 (Memory Map Diagram): Updated/Changed memory map (Figure 6-10 .................................... 69 • Table 6-22 (Flash Memory Banks and Sectors): Updated/Changed the BANK 0 Sector No. to support 1MB Flash .. 75 • Table 6-22: Added associated footnotes ........................................................................................ 75 • Figure 6-11 (TCRAM Block Diagram): Updated/Changed figure ............................................................. 78 • Added table notes identifying address ranges of ESRAM PBIST groups ................................................... 80 • Updated/Changed N2HET2 RAM ending address from "0xFF57FFFF" to "0xFF45FFFF" in Table 6-26, Memory Initialization .......................................................................................................................... 81 • Updated EMIF Timings ............................................................................................................ 82 • Changed maximum addressable size of asynchronous memories from 16MB to 32KB .................................. 82 • Updated/Changed the EMIF address bus signals from "EMIF_ADDR[21:0]" to "EMIF_ADDR[12:0]" for all figures in Section 6.14.2, Electrical and Timing Specifications ........................................................................ 82 • Updated/Changed EMIF address from "EMIF_ADDR[21:0]" to "EMIF_ADDR[12:0]" ...................................... 82 • Added "E = EMIF_CLK period in ns." footnote .................................................................................. 84 • Added MIN value to EMIF clock period in Table 6-27, EMIF Asynchronous Memory Timing Requirements ........... 84 • Changed EMIF tsu(EMDV-EMOEH) from 30nS to 9nS................................................................................ 84 • Changed EMIF th(EMOEH-EMDIV) from 0.5nS to 0nS ............................................................................... 84 • Changed EMIF tsu(EMOEL-EMWAIT) from 4E+30nS to 4E+9nS .................................................................... 84 • Changed EMIF tsu(EMWEL-EMWAIT) from 4E+30nS to 4E+14nS................................................................... 84 • Changed EMIF tsu(EMCEL-EMOEL) from (RS)*E-5 to (RS)*E-6..................................................................... 85 6 Revision History Copyright © 2012–2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TMS570LS1114 |
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