AD6635BBSLASHPCB datasheet(28/60 Pages) AD

28 / 60 page

REV. 0

–28–

AD6635

Both LrCIC2 and MrCIC2 are unsigned integers. The interpolation

rate (LrCIC2) may be from 1 to 512 and the decimation (MrCIC2)

may be from 1 to 4096. The stage can be bypassed by setting

the decimation/interpolation to 1/1.

The frequency response of the rCIC2 filter is given by the fol-

lowing equations.

SrCIC

rCIC

MrCIC

LrCIC

() =

ÁÁ

˜˜

–

SrCIC

rCIC

SAMP

() =

ËÁ

¯˜

ËÁ

¯˜

sin

The scale factor, SrCIC2 is a programmable unsigned 5-bit value

between 0 and 31. This serves as an attenuator that can reduce

the gain of the rCIC2 in 6 dB increments. For the best dynamic

range, SrCIC2 should be set to the smallest value possible (i.e.,

lowest attenuation) without creating an overflow condition.

This can be safely accomplished using the equation below,

where input_level is the largest fraction of full scale possible at

the input to the AD6635 (normally 1). The rCIC2 scale factor

is always used, whether or not the rCIC2 is bypassed.

ceil

floor

rCIC

ËÁ

¯˜

¥¥

ËÁ

¯˜

ËÁ

¯˜

log

–

input

level

CIC

rCIC

SrCIC

()

The ceil function used above denotes the next whole integer,

and the floor function denotes the previous whole integer. For

example, ceil(4.5) is 5, while floor(4.5) is 4.

There are two scale registers (rCIC2_LOUD[4:0] Bits 4–0 in

0x92), and (rCIC2_QUIET[4:0] Bits 9–5 in 0x92), which are

used to implement the SrCIC2 scale factor. The value written into

the these programmable registers is the sum total of SrCIC2, ExpOff

required for floating point ADCs (explained in the Input Port

section), and any compensation for external attenuation that

may be activated using the LI (level indicator) pins. The third

component can have different values when the LI pin is active

and when it is inactive, and hence two registers, rCIC2_LOUD

and rCIC2_QUIET. The sum total of these components is

supplied to the AD6635 as rCIC2_LOUD and rCIC2_QUIET

registers, and these registers can contain a maximum number of

31. It should also be noted that the scaling specified by these

(before the rCIC2 filter).

The gain and passband droop of the rCIC2 should be calculated

by the equations above, as well as the filter transfer equations

mentioned previously. Excessive passband droop can be com-

pensated for in the RCF stage by peaking the pass band by the

inverse of the roll-off.

scaled

input

ExpInv

scaled

input

ExpInv

Exp rCIC

–mod(

–mod( –

=¥

32)

where IN is the value of INx[13:0] (x = A, B, C, D), Exp is the

value of EXPx[2:0], and rCIC2 is the value of the 0x92

(rCIC2_QUIET[4:0] or rCIC2_LOUD[4:0], depending on

LI pin) scale register.

rCIC2 Rejection

Table III illustrates the amount of bandwidth in percent of the

data rate into the rCIC2 stage. The data in this table may be

scaled to any other allowable sample rate up to 80 MHz. The

table can be used as a tool to decide how to distribute the deci-

mation between rCIC2, CIC5 and the RCF.

Table III. SSB rCIC2 Alias Rejection Table (fSAMP = 1)

Bandwidth Shown as Percentage of fSAMP. (input rate)

MrCIC2

/LrCIC2

–50 dB –60 dB –70 dB –80 dB

–90 dB –100 dB

1.790

1.007

0.566

0.318

0.179

0.101

1.508

0.858

0.486

0.274

0.155

0.087

1.217

0.696

0.395

0.223

0.126

0.071

1.006

0.577

0.328

0.186

0.105

0.059

0.853

0.490

0.279

0.158

0.089

0.050

0.739

0.425

0.242

0.137

0.077

0.044

0.651

0.374

0.213

0.121

0.068

0.038

0.581

0.334

0.190

0.108

0.061

0.034

0.525

0.302

0.172

0.097

0.055

0.031

0.478

0.275

0.157

0.089

0.050

0.028

0.439

0.253

0.144

0.082

0.046

0.026

0.406

0.234

0.133

0.075

0.043

0.024

0.378

0.217

0.124

0.070

0.040

0.022

0.353

0.203

0.116

0.066

0.037

0.021

0.331

0.190

0.109

0.061

0.035

0.020

Example Calculations

Goal: Implement a filter with an input sample rate of 10 MHz

requiring 100 dB of alias rejection for a

±7 kHz pass band.

Solution: First determine the percentage of the sample rate that

is represented by the pass band.

kHz

MHz

FRACTION

=¥

100

007

In the –100 dB column on the right of the table, look for a

value greater than or equal to your passband percentage of the

clock rate. Then look across to the extreme left column and

find the corresponding rate change factor (MrCIC2/LrCIC2). Referring

to the table, notice that for a MrCIC2/LrCIC2 of 4, the frequency

having –100 dB of alias rejection is 0.071%, which is slightly

greater than the 0.07% calculated. Therefore, for this example,

the maximum bound on rCIC2 rate change is 4. Choosing a

higher MrCIC2/LrCIC2 results in less alias rejection than the

required 100 dB.

An MrCIC2/LrCIC2 of less than 4 would still yield the required

rejection, however the power consumption can be minimized by

decimating as much as possible in this rCIC2 stage. Decimation

in rCIC2 lowers the data rate, and thus reduces power consumed

in subsequent stages. It should also be noted that there is more

than one way to get the decimation of 4. A decimation of 4 is

the same as an L/M ratio of 0.25. Thus, any integer combination

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