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PC87413 датащи(PDF) 190 Page - National Semiconductor (TI) |
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PC87413 датащи(HTML) 190 Page - National Semiconductor (TI) |
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190 / 257 page ![]() 9.0 System Wake-Up Control (SWC) (Continued) www.national.com 190 Revision1.2 9.3.12 LED Control Register (LEDCTL) This register controls the operation mode of the two LEDs driven by the PC8741x device. It is reset by hardware to 00h. Power Well:VPP Location: All Banks, Offset 0Ah Type: R/W Bit 76 5 43210 Name Reserved LEDCFG LEDPOL Reserved LEDMOD Reset 0 0 0 00000 Bit Description 7-6 Reserved. 5 LEDCFG (LED Configuration). This bit enables the use of either two regular LEDs, connected between each pin (LED1, LED2) and ground or VSB, or one dual-colored LED, connected between the LED1 and LED2 pins. 0: One dual-colored LED (default) 1: Two regular LEDs 4 LEDPOL (LED Polarity). This bit determines the polarity of LED1 and LED2 outputs. An active output, according to this bit setting, turns the LED On. For the dual-colored LED configuration, changing the polarity reverses the LED colors. 0: Active high - LED cathode connected to ground (default) 1: Active low - LED anode connected to VSB 3-2 Reserved. 1-0 LEDMOD (LED Operation Mode). These bits control the operation mode of LED1 and LED2 in each power state. Table 50 shows the behavior of the LED1 and LED2 outputs as a function of the system power state. Table 50. LED1 and LED2 as a Function of the Power State LEDMOD Power Fail1 1. Power Fail: VSB and VDD Off. Power Off: VSB On, VDD Off. Power On: VSB and VDD On; Power Off1 State S452 2. Sleep states S3I and S45 are PC8741x device current states (see Section 9.3.31 on page 200). State S3I2 Power On1 LED1 LED2 00 (default) Yes Off Off No XXXX S/W13 3. Controlled by the value of LED1BLNK in the LEDBLNK register. S/W24 4. Controlled by the value of LED2BLNK in the LEDBLNK register. 01 Yes Off Off Yes X X Blink5 5. 1 Hz blink with 50% duty cycle. Blink5 Yes S/W1 S/W2 10 Yes Off Off X Yes Off Off X Yes S/W1 S/W2 Yes S/W1 S/W2 11 Yes Off Off X Yes S/W1 S/W2 X Yes S/W1 S/W2 Yes S/W1 S/W2 |
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