PC87413 datasheet(180/257 Pages) NSC

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9.0 System Wake-Up Control (SWC) (Continued)

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180

Revision1.2

9.3.3

Wake-Up State Enable Register (WK_ST_EN)

This register configures the wake-up event selected by the Wake-Up Event Select register. Two different classes (A and B)

are defined for this register (see Table 48 on page 179). Both classes are reset by hardware to 00h.

The sleep states for which the outputs are enabled when the event is active are PC8741x device current states (see Section

9.2.3 on page 167).

Power Well:VPP

Location: All Banks, Offset 01h

Type:

R/W

Class:

Bit

76543210

Name

Reserved

PWBT_EN

_S3I

PWBT_EN

_S45

ONCTL_EN

_S3I

ONCTL_EN

_S45

Reset

00000000

Bit

76543210

Name

Reserved

ONCTL_EN

_S3I

ONCTL_EN

_S45

Reset

00000000

Bit

Description

7-4

Reserved.

Class A

PWBT_EN_S3I (PWBTOUT Pulse Enable in S3I). Enables generating a PWBTOUT pulse when the selected

event becomes active and the device is in S3I sleep state. The selected event affects the output regardless of

the setting of the related enable bit in the GPE1_EN_n register. However, for a PWBTOUT pulse to be

generated, the PWBTOUT_MODE bit in the ACPI_CFG register (see Section 9.3.32 on page 201) must be ‘0’.

0: Disable pulse (default)

1: Enable pulse in S3I state

Class A

PWBT_EN_S45 (PWBTOUT Pulse Enable in S45). Enables generating a PWBTOUT pulse when the selected

event becomes active and the device is in S45 sleep state. The selected event affects the output regardless of

the setting of the related enable bit in the GPE1_EN_n register. However, for a PWBTOUT pulse to be

generated, the PWBTOUT_MODE bit in the ACPI_CFG register (see Section 9.3.32 on page 201) must be ‘0’.

0: Disable pulse (default)

1: Enable pulse in S45 state

3-2

Class B

Reserved.

ONCTL_EN_S3I (ONCTL Active Enable in S3I). Enables activation (turning the VDD power On) Of the ONCTL

output when the selected event becomes active and the device is in the S3I sleep state. The selected event

affects the output regardless of the setting of the related enable bit in the GPE1_EN_n register. This bit is

relevant only if the PC8741x device is the ACPI controller of the system (EXT_ST_SELECT = 0 in the

SLP_ST_CFG register).

0: Disable activation (default)

1: Enable activation in S3I state

ONCTL_EN_S45 (ONCTL Active Enable in S45). Enables activation (turning the VDD power On) of the ONCTL

output when the selected event becomes active and the device is in the S45 sleep state. The selected event

affects the output regardless of the setting of the related enable bit in the GPE1_EN_n register. This bit is

relevant only if the PC8741x device is the ACPI controller of the system (EXT_ST_SELECT = 0 in the

SLP_ST_CFG register).

0: Disable activation (default)

1: Enable activation in S45 state

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