ACE9050 datasheet(27/52 Pages) MITEL

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ACE9050

AAK Assert Acknowledge.

This bit is used to determine whether an Acknowledge bit is

sent when the I2C Receives data. It also indicates the last byte

to transmit when the I2C is in Slave Transmit mode.

AAK is set to one: An acknowledge (low level on SDA) will be

sent during the acknowledge clock pulse on the I2C bus when:

1. The Slave address has been received.

2. The general call address has been received and the GCE bit

in the I2C ADDR registers set to one.

3. A data byte has been received in Master or Slave mode.

AAK is cleared to zero: When a data byte is received a Not

Acknowledge (high level on SDA) will be sent, both in Master and

Slave modes.

In the Slave Transmitter mode then the byte in the I2C_DATA

transmitted the I2C will enter state C8H then return to the idle

state.

I2C_STAT Status Register Read

This read only register contains a 5-bit status code, as shown

in Table 41.

Bit

[7:3]

[2:0]

STATUS

State code

Read back as zero

Name

Description

Table 41

There are 27 possible status codes. When I2C_STAT

contains the status code F8H no relevant status information is

available and the IFLG bit in the I2C_CNTR register is not set.

All other status codes correspond to a defined state of the

ACE9050 I2C. When each of these states is entered the

corresponding status code appears in this register and the

IFLG bit in the I2C_CNTR register is set.

When the IFLG bit is cleared the status code returns to

F8H. The 27 possible status codes shown in Table 42

If an illegal condition occurs on the I2C bus then the bus

error state is entered, status code 00H. To recover from this

state the STP bit in the I2C_CNTR register must be set and

the IFLG bit cleared. The I2C will then return to the idle state,

no STOP condition will be transmitted on the I2C bus..

Status

Code (Hex)

Bus error

START condition transmitted

Repeat START condition transmitted

Address + write bit transmitted, ACK received

Address + write bit transmitted, ACK not received

Data byte transmitted in master mode, ACK received

Data byte transmitted in master mode, ACK not received

Arbitration lost in address or data byte

Address + read bit transmitted, ACK received

Address + read bit transmitted, ACK not transmitted

Data byte received in master mode, ACK transmitted

Data byte received in master mode, Not ACK transmitted

Slave address + write bit received, ACK transmitted

Arbitration lost in address as master, slave address + write bit received, ACK transmitted

General call address received, ACK transmitted

Arbitration lost in address as master, General call address received, ACK transmitted

Data byte received after slave address received, ACK transmitted

Data byte received after slave address received, Not ACK transmitted

Data byte received after General Call received, ACK transmitted

Data byte received after General Call received, Not ACK transmitted

STOP or repeat START condition received in slave mode

Slave address + read bit received, ACK transmitted

Arbitration lost in address as master, slave address + read bit received, ACK transmitted

Data byte transmitted in slave mode, ACK received

Data byte transmitted in slave mode, ACK not received

Last byte transmitted in slave mode, ACK received

No relevant status information, IFLG =O

Table 42 Possible values of I2C_STAT Register

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