MPC8569E datasheet(82/127 Pages) FREESCALE

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MPC8569E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 1

High-Speed SerDes Interfaces (HSSI)

Freescale Semiconductor

— For external DC-coupled connection, as described in Section 2.9.2.2, “SerDes Reference Clock Receiver

Characteristics,” the maximum average current requirements sets the requirement for average voltage (common

mode voltage) to be between 100 and 400 mV. The following figure shows the SerDes reference clock input

requirement for DC-coupled connection scheme.

Figure 40. Differential Reference Clock Input DC Requirements (External DC-Coupled)

— For external AC-coupled connection, there is no common mode voltage requirement for the clock driver. Since

the external AC-coupling capacitor blocks the DC level, the clock driver and the SerDes reference clock receiver

operate in different command mode voltages. The SerDes reference clock receiver in this connection scheme has

its common mode voltage set to SCOREGND. Each signal wire of the differential inputs is allowed to swing

below and above the command mode voltage (SCOREGND). The following figure shows the SerDes reference

clock input requirement for AC-coupled connection scheme.

Figure 41. Differential Reference Clock Input DC Requirements (External AC-Coupled)

•

Single-ended mode

— The reference clock can also be single-ended. The SD_REF_CLK input amplitude (single-ended swing) must be

between 400 and 800 mV peak-peak (from Vmin to Vmax) with SD_REF_CLK either left unconnected or tied to

ground.

— The SD_REF_CLK input average voltage must be between 200 and 400 mV. Figure 42 shows the SerDes

reference clock input requirement for single-ended signaling mode.

— To meet the input amplitude requirement, the reference clock inputs might need to be DC- or AC-coupled

externally. For the best noise performance, the reference of the clock could be DC- or AC-coupled into the unused

phase (SD_REF_CLK) through the same source impedance as the clock input (SD_REF_CLK) in use.

SD_REF_CLK

Vmax < 800 mV

Vmin > 0V

100 mV < Vcm < 400 mV

200 mV < Input Amplitude or Differential Peak < 800 mV

SD_REF_CLK

Vcm

200 mV < Input Amplitude or Differential Peak < 800 mV

Vmax

< Vcm + 400 mV

Vmin

> Vcm – 400 mV

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