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MPC8569E датащи(PDF) 60 Page - Freescale Semiconductor, Inc |
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MPC8569E датащи(HTML) 60 Page - Freescale Semiconductor, Inc |
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60 / 127 page ![]() MPC8569E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 1 Ethernet Interface Freescale Semiconductor 60 The following figure provides the AC test load. Figure 20. AC Test Load The following figure shows the RMII receive AC timing diagram. Figure 21. RMII Receive AC Timing Diagram 2.6.3.5 TBI AC Timing Specifications This section describes the TBI transmit and receive AC timing specifications. Fall time REF_CLK (80%–20%) tRMRF 1.0 — 4.0 ns 1 RXD[1:0], CRS_DV, RX_ER setup time to REF_CLK rising edge tRMRDV 4.0 — — ns — RXD[1:0], CRS_DV, RX_ER hold time to REF_CLK rising edge tRMRDX 2.0 — — ns — Note: 1. System/board must be designed to ensure the input requirement to the device is achieved. Proper device operation is guaranteed for inputs meeting this requirement by design, simulation, characterization, or functional testing. Table 31. RMII Receive AC Timing Specifications (continued) For recommended operating conditions, see Table 3 Parameter Symbol Min Typ Max Unit Note Output Z0 = 50 Ω LVDD/2 RL = 50 Ω REF_CLK RXD[1:0] tRMRKHDX tRMR tRMRH tRMRR tRMRF CRS_DV RX_ER tRMRDVKH Valid Data |
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