MPC8569E datasheet(42/127 Pages) FREESCALE

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MPC8569E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 1

Power Characteristics

Freescale Semiconductor

2.1.4

Power-on Ramp Rate

This section describes the AC electrical specifications for the power-on ramp rate requirements. Controlling the maximum

Power-On Ramp Rate is required to avoid falsely triggering the ESD circuitry. The following table provides the power supply

ramp rate specifications.

2.2

Power Characteristics

The following table shows the power dissipations of the VDD supply for various operating core complex bus clock (CCB_clk)

frequencies versus the core, DDR data rate, and QUICC Engine block frequencies. Note that these numbers are based on design

estimates only and are preliminary. More accurate power numbers are available after the measurement on the silicon is

complete.

Table 7. Power Supply Ramp Rate

Parameter

Min

Max

Unit

Notes

Required ramp rate for all voltage supplies (including OVDD/CVDD/

GVDD/BVDD/SVDD/LVDD, All VDD supplies, MVREF and all AVDD sup-

plies.)

—

36000

V/s

1, 2

Note:

1. Ramp rate is specified as a linear ramp from 10 to 90%. If non-linear (for example, exponential), the maximum rate of change

from 200 to 500 mV is the most critical as this range may falsely trigger the ESD circuitry.

2. Over full recommended operating temperature range (see Table 3).

Table 8. MPC8569E Power Dissipation

Power Mode

Core

Frequency

(MHz)

Platform

Frequency

(MHz)

DDR Data

Rate

Frequency

(MHz)

QUICC

Engine

Block

Frequency

(MHz)

VDD

Core

(V)

Junction

Temperature

(

°C)

Power5

Notes

Typical

800

400

600

400

1.0

3.4 W

1, 2

Thermal

105

4.9 W

1, 3

Maximum

5.4 W

1, 4

Typical

1067

533

667

533

1.0

3.9 W

1, 2

Thermal

105

5.4 W

1, 3

Maximum

6.0 W

1, 4

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