MPC8569E datasheet(43/127 Pages) FREESCALE

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Input Clocks

MPC8569E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 1

Freescale Semiconductor

2.3

Input Clocks

The following table provides the system clock (SYSCLK) DC specifications.

Typical

1333

533

800

667

1.1

5.7 W

1, 2

Thermal

105

7.9 W

1, 3

Maximum

8.6 W

1, 4

Note:

1. These values do not include power dissipation for I/O supplies.

2. Typical power is an average value measured while running the Dhrystone benchmark, using the nominal process and

recommended core voltage (VDD) at 65 °C junction temperature (see Table 3).

3. Thermal power is the maximum power measured while running the Dhrystone benchmark, using the worst case process and

recommended core voltage (VDD) at maximum operating junction temperature (see Table 3).

4. Maximum power is the maximum power measured while running a test which includes an entirely L1-cache-resident,

contrived sequence of instructions that keeps the execution unit maximally busy and a typical workload on platform interfaces,

using the worst case process and nominal core voltage (VDD) at maximum operating junction temperature (see Table 3).

5. This table includes power numbers for the VDD, AVDD_n, and ScoreVDD rails.

Table 9. SYSCLK DC Electrical Characteristics

At recommended operating conditions with OVDD = 3.3 V ± 165 mV

Parameter

Symbol

Min

Typical

Max

Unit

Notes

Input high voltage

VIH

2.0

—

Input low voltage

VIL

——

0.8

Input capacitance

CIN

—

10.5

11.5

—

Input current (VIN= 0 V or VIN = VDD)

IIN

——

±50

μA2

Note:

1. The min VILand max VIH values are based on the respective min and max OVIN values found in Table 3.

2. The symbol VIN, in this case, represents the OVIN symbol referenced in Table 3.

Table 8. MPC8569E Power Dissipation (continued)

Power Mode

Core

Frequency

(MHz)

Platform

Frequency

(MHz)

DDR Data

Rate

Frequency

(MHz)

QUICC

Engine

Block

Frequency

(MHz)

VDD

Core

(V)

Junction

Temperature

(

°C)

Power5

Notes

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