PCA9620 datasheet(55/71 Pages) NXP

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PCA9620

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Product data sheet

Rev. 1 — 9 December 2010

55 of 71

NXP Semiconductors

PCA9620

Universal LCD driver for low multiplex rates

11. Static characteristics

Table 35.

Static characteristics

VDD1 = 2.5 V to 5.5 V; VDD2 = 2.5 V to 5.5 V; VSS = 0 V; VLCD = 2.5 V to 9.0 V; Tamb = −40 °C to +105 °C; unless otherwise

specified.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Supplies

VDD1

supply voltage 1

2.5

5.5

VDD2

supply voltage 2

VDD2 ≥ VDD1

2.5

5.5

VLCD

LCD supply voltage

VLCD ≥ VDD2

[1] 2.5

9.0

ΔV

LCD

LCD voltage variation

VLCD = 5.0 V to 9.0 V

[2]

Tamb = −40 °C to −10 °C

−100

+100

Tamb = −10 °C to +70 °C

−70

+70

Tamb = +70 °C to +105 °C

−100

+100

IDD(pd)

power-down mode supply

current

on pin VDD1

[3][4] -1.0

3.0

μA

IDD1

supply current 1

[4][5] -100

200

μA

IDD2

supply current 2

fosc = 9.6 kHz

charge pump off; external VLCD

[4][5] -0.5

3.0

μA

charge pump on; internal VLCD

[4][6] -250

550

μA

IDD(LCD)

LCD supply current

external VLCD

[4][7] -125

250

μA

ILCD(pd)

power-down LCD current

external VLCD

[3][4] -12

μA

output resistance

of charge pump (driving capabilities)

charge pump set to 2

× V

DD2;

Iload = 3 mA (on pin VLCD)

[8] 0.2

0.85

1.6

charge pump set to 3

× V

DD2;

Iload = 2 mA (on pin VLCD)

[9] 2.0

3.2

4.5

Tacc

temperature accuracy

readout temperature error;

VDD1 =5.0 V

Tamb = −40 °C to +105 °C

−6-

°C

Tamb =27 °C

−4-

°C

Logic

input voltage

VSS − 0.5 -

VDD + 0.5 V

VIL

LOW-level input voltage

on pins CLK, A1, A0

0.3VDD

VIH

HIGH-level input voltage

on pins CLK, A1, A0

0.7VDD

output voltage

−0.5

VDD + 0.5 V

VOH

HIGH-level output voltage on pin CLK

0.8VDD

VOL

LOW-level output voltage

on pin CLK

0.2VDD

IOH

HIGH-level output current

output source current;

VOH =4.6 V; VDD = 5 V; on pin CLK

IOL

LOW-level output current

output sink current;

VOL = 0.4 V; VDD = 5 V; on pin CLK

VPOR

power-on reset voltage

[10] --

1.6

leakage current

Vi =VDD or VSS; on pins CLK, A1,

A0, T1, T2, T3

[11] -0

μA

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