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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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PCA9620 датащи(PDF) 46 Page - NXP Semiconductors |
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PCA9620 датащи(HTML) 46 Page - NXP Semiconductors |
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46 / 71 page  PCA9620 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 1 — 9 December 2010 46 of 71 NXP Semiconductors PCA9620 Universal LCD driver for low multiplex rates In order to fill the whole RAM addresses 60 bytes need to be sent to the PCA9620. After the last byte sent the data pointer is wrapped around to column 0 to start a possible RAM content update (see Figure 40). In this case there is no situation possible where a transmitted data byte can be written over the RAM boundary. 7.9.2 Bank selection A RAM bank can be thought of as a collection of RAM rows. The PCA9620 includes a RAM bank switching feature in the static, 1:2, and 1:4 multiplex drive modes. The RAM bank switching gives the provision for preparing display information in an alternative bank and to be able to switch to it once it is complete. Input and output banks can be set independently from one another with the input-bank-select and the output-bank-select commands; Figure 41 shows the concept. Fig 39. Display RAM filling order in 1:8 multiplex drive mode Fig 40. Data pointer wrap around in 1:8 multiplex drive mode 0 1 2 34 56 7 55 56 57 58 59 b0 b1 b2 b3 b4 b5 b6 b7 0 MSB LSB 1 2 3 4 5 6 7 transmitted data byte b7 b6 b5 b4 b3 b2 b1 b0 display RAM columns/segment outputs (S) columns display RAM rows/ backplane outputs (BP) rows 013aaa267 0 1 2 34 56 7 55 56 57 58 59 0 1 2 3 4 5 6 7 b7 b6 b5 b4 b3 b2 b1 b0 display RAM data pointer 013aaa291 a7 a6 a5 a4 a3 a2 a1 a0 wrap around |
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