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PCA9620 датащи(PDF) 37 Page - NXP Semiconductors |
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PCA9620 датащи(HTML) 37 Page - NXP Semiconductors |
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37 / 71 page ![]() PCA9620 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 1 — 9 December 2010 37 of 71 NXP Semiconductors PCA9620 Universal LCD driver for low multiplex rates [1] The relationship between the temperature coefficients MA to MD and the slope factor is derived from the following equation: . [2] Default value. The slope factors imply a linear correction, however the implementation is set in steps of 30 mV (parameter n in Table 27 on page 31). Remark: After reset, VLCD is fixed because the VPR[7:0] bit field is reset logic 0. The value of VT[7:0] is generated by the reset value of TD[7:0] (40h, representing 20 °C). Temperature compensation is implemented by adding an offset VT[7:0] to the VPR[7:0] value. VT[7:0] is a two’s complement number that equals 0h at 20 °C. The final result for VLCD calculation is an 8-bit positive number (see Equation 6 on page 31). Remark: Care must be taken that the ranges of VPR[7:0] and VT[7:0] don’t cause clipping and hence undesired results. The device will not permit overflow or underflow and will clamp results to either end of the range. Table 29. Temperature coefficients SLA[2:0] to SLD[2:0] value Corresponding slope factor (mV/ °C) Temperature coefficients MA, MB, MC, MD[1] 000[2] 00.00 001 −4 −0.125 010 −8 −0.25 011 −16 −0.5 100 −40 −1.25 101 +4 0.125 110 +8 0.25 111 +16 0.5 Fig 29. Example of segmented temperature coefficients Mx 0.9375 0.03 ---------------- slope 1000 -------------- × = Temperature ( °C) −40 50 −10 013aaa261 TD[7:0] 0h 60h 20h zero offset at 20 °C 79 20 7Fh 40h MC MA MD MB SLA SLB SLC SLD |
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