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PCA9620 датащи(PDF) 17 Page - NXP Semiconductors

номер детали PCA9620
подробное описание детали  Universal LCD driver for low multiplex rates
PDF  71 Pages
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производитель  NXP [NXP Semiconductors]
домашняя страница  http://www.nxp.com
Logo NXP - NXP Semiconductors

PCA9620 датащи(HTML) 17 Page - NXP Semiconductors

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PCA9620
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 1 — 9 December 2010
17 of 71
NXP Semiconductors
PCA9620
Universal LCD driver for low multiplex rates
Fig 7.
Recommended start-up sequence when using an external supplied VLCD and the
internal clock signal
(1) The external clock signal can be applied after the generation of the VLCD voltage as well.
(2) This time depends on the external capacitor on pin VLCD. For a capacitor of 100 nF a delay of 5 ms
to 15 ms is expected.
(3) RAM data may be written before or during the ramp-up of VLCD.
Fig 8.
Recommended start-up sequence when using the internal charge pump and an
external clock signal
Wait 1 ms
START
Power-on
VDD1, VDD2,
and VLCD
at the
same time
Initialize
command
013aaa250
Write RAM
content to be
displayed and
enable the
display
STOP
Initiate an
OTP-refresh
Wait 1 ms
START
Power-on
VDD1 and
VDD2 at the
same time
Initialize
command
013aaa251
Set VPR
register to
desired VLCD
value
Wait till
VLCD reaches
programmed
value(2)
Write RAM
content to be
displayed and
enable the
display(3)
STOP
Apply external
clock signal
to pin CLK;
set OSC bit
logic 1(1)
(1)
Initiate an
OTP-refresh
Set
multiplication
factor for
charge pump
and enable it



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