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PCA9620 датащи(PDF) 4 Page - NXP Semiconductors |
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PCA9620 датащи(HTML) 4 Page - NXP Semiconductors |
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4 / 71 page ![]() PCA9620 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 1 — 9 December 2010 4 of 71 NXP Semiconductors PCA9620 Universal LCD driver for low multiplex rates 6.2 Pin description [1] When the internal VLCD generation is used, this pin drives the VLCD voltage. In this case pin VLCD is an output. When the external supply is requested then pin VLCD is an input and VLCD can be supplied to it. In this case the internal charge pump must be disabled (see Table 8 on page 7). Table 3. Pin description Symbol Pin Type Description S0 to S59 61 to 80 and 1 to 40 output LCD segment BP0 to BP7 41 to 48 output LCD backplane VLCD 49 supply/output[1] LCD supply voltage VDD2 50 supply supply voltage 2 (charge pump) VDD1 51 supply supply voltage 1 (analog and digital) VSS 52 supply ground supply voltage T1 to T3 53 to 55 input test pins; must be tied to VSS in applications CLK 56 input/output internal oscillator output, external oscillator input A0, A1 57, 58 input I2C-bus slave address selection bit SCL 59 input I2C-bus serial clock SDA 60 input/output I2C-bus serial data |
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