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910GL датащи(PDF) 228 Page - Intel Corporation |
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910GL датащи(HTML) 228 Page - Intel Corporation |
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228 / 426 page ![]() Functional Description R 228 Datasheet 12.3.1.2 System Memory Supported Configurations The (G)MCH supports the 256-Mbit, 512-Mbit and 1-Gbit technology based DIMMs from Table 12-3. Table 12-3. DDR / DDR2 DIMM Supported Configurations Technology Configuration # of Row Address Bits # of Column Address Bits # of Bank Address Bits Page Size Rank Size 256Mbit 16M X 16 13 9 2 4K 128 MB 256Mbit 32M X 8 13 10 2 8K 256 MB 512Mbit 32M X 16 13 10 2 8K 256 MB 512Mbit 64M X 8 13 11 2 16K 512 MB 512Mbit 64M X 8 14 10 2 8K 512 MB 1Gbit 64M X 16 14 10 2 8K 512 MB 1Gbit 128M X 8 14 11 2 16K 1 GB 1Gbit 64M X 16 13 10 3 8K 512 MB 1Gbit 128M X 8 14 10 3 8K 1 GB 12.3.1.3 Main Memory DRAM Address Translation and Decoding Table 12-4 and Table 12-5 specify the host interface to memory interface address multiplex for the (G)MCH. Refer to the details of the various DIMM configurations as described in Table 12-3. The address lines specified in the column header refer to the host (processor) address lines. |
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