910GL datasheet(132/426 Pages) INTEL

132 / 426 page

Host-PCI Express* Bridge Registers (D1:F0)

(Intel® 82915G/82915P/82915PL Only)

132

Datasheet

8.1.5

RID1—Revision Identification (D1:F0)

PCI Device:

Address Offset:

08h

Default Value:

See bit description

Access:

Size:

8 bits

This register contains the revision number of the (G)MCH device 1.

Bit

Access &

Default

Description

7:0

00h

Revision Identification Number (RID1): This field indicates the number of times

that this device in this component has been “stepped” through the manufacturing

process. Refer to the Intel

82915G/82915P/82915PL/82915GV/82915GL/82910GL Express Chipset

Specification Update for the value of the Revision ID Register.

8.1.6

CC1—Class Code (D1:F0)

PCI Device:

Address Offset:

09h

Default Value:

060400h

Access:

Size:

24 bits

This register identifies the basic function of the device, a more specific sub-class, and a register-

specific programming interface.

Bit

Access &

Default

Description

23:16

06h

Base Class Code (BCC): This field indicates the base class code for this

device.

06h = Bridge device.

15:8

04h

Sub-Class Code (SUBCC): This field indicates the sub-class code for this

device.

04h = PCI-to-PCI Bridge.

7:0

00h

Programming Interface (PI): This field indicates the programming interface of

this device. This value does not specify a particular register set layout and

provides no practical use for this device.

910GL датащи(PDF) 132 Page - Intel Corporation

910GL датащи(HTML) 132 Page - Intel Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL