910GL datasheet(120/426 Pages) INTEL

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DMIBAR Registers—Direct Media Interface (DMI) RCRB

120

Datasheet

7.1.7

DMIVC0RSTS—DMI VC0 Resource Status

MMIO Range:

DMIBAR

Address Offset:

01Ah

Default Value:

00000002h

Access:

Size:

16 bits

This register reports the Virtual Channel specific status.

Bit

Access &

Default

Description

15:2

Reserved

VC Negotiation Pending (NP):

0 = Virtual channel is Not being negotiated with ingress ports.

1 = Virtual channel is still being negotiated with ingress ports.

Port Arbitration Tables Status (ATS): There is no port arbitration table for this

VC, so this bit is reserved at 0.

7.1.8

DMIVC1RCAP—DMI VC1 Resource Capability

MMIO Range:

DMIBAR

Address Offset:

01Ch

Default Value:

00008001h

Access:

Size:

32 bits

Bit

Access &

Default

Description

31:24

00h

Port Arbitration Table Offset (AT): This field indicates the location of the port

arbitration table in the root complex. A value of 3h indicates the table is at offset

30h.

Reserved

22:16

00h

Maximum Time Slots (MTS): This value is updated by platform BIOS based upon

the determination of the number of time slots available in the platform.

Reject Snoop Transactions (RTS): All snoopable transactions on VC1 are

rejected. This VC is for isochronous transfers only.

Advanced Packet Switching (APS): This VC is capable of all transactions, not

just advanced packet switching transactions.

13:8

Reserved

7:0

01h

Port Arbitration Capability (PAC): This field indicates the port arbitration

capability is time-based WRR of 128 phases.

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