ADS58C48IPFPR datasheet(56/70 Pages) TI

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ADS58C48

SLAS689 – MAY 2010

www.ti.com

OFFSET CORRECTION

ADS58C48 has an internal offset correction algorithm that estimates and corrects dc offset up to ±10 mV. The

correction can be enabled using the serial register bit <EN OFFSET CORR>. Once enabled, the algorithm

estimates the channel offset and applies the correction every clock cycle. The time constant of the correction

loop is a function of the sampling clock frequency. The time constant can be controlled using register bits

<OFFSET CORR TIME CONSTANT> as described in Table 12.

After the offset is estimated, the correction can be frozen by setting <FREEZE OFFSET CORR > = 1. Once

frozen, the last estimated value is used for offset correction every clock cycle. Note that offset correction is

disabled by default after reset.

After a reset, the offset correction is disabled. To use offset correction:

•

First, program the bits <DIGITAL MODE 1> and <DIGITAL MODE 2> as per the table above to enable the

correction.

•

Then set <EN OFFSET CORR> to 1 and program the required time constant.

Table 12. Time Constant of Offset Correction Algorithm

TIME CONSTANT (Number of clock

TIME CONSTANT, TCCLK x

OFFSET CORR

cycles)

1/fs(sec)(1)

0000

5.2 ms

0001

10.5 ms

0010

21 ms

0011

42 ms

0100

16M

84 ms

0101

32M

167.8 ms

0110

64M

335.5 ms

0111

128M

671 ms

1000

256M

1.34 s

1001

512M

2.7 s

1010

5.4 s

1011

10.7 s

1100

Reserved

—

1101

Reserved

—

1110

Reserved

—

1111

Reserved

—

(1)

Sampling frequency, Fs = 200 MSPS

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