ADS58C48IPFPR datasheet(4/70 Pages) TI

4 / 70 page

ADS58C48

SLAS689 – MAY 2010

www.ti.com

RECOMMENDED OPERATING CONDITIONS

over operating free-air temperature range (unless otherwise noted)

MIN

NOM

MAX

UNIT

SUPPLIES

Analog supply voltage, AVDD

1.7

1.8

1.9

Digital supply voltage, DRVDD

1.7

1.8

1.9

ANALOG INPUTS

Differential input voltage range

VPP

Input common-mode voltage

VCM ±0.05

Maximum analog input frequency with 2-V pp input amplitude

(1)

400

MHz

Maximum analog input frequency with 1-V pp input amplitude

(1)

600

MHz

CLOCK INPUT

Input clock sample rate

200

MSPS

Input clock amplitude differential

Sine wave, ac-coupled

0.2

1.5

Vpp

(VCLKP - VCLKM)

LVPECL, ac-coupled

1.6

Vpp

LVDS, ac-coupled

0.7

Vpp

LVCMOS, single-ended, ac-coupled

3.3

Input clock duty cycle

50%

DIGITAL OUTPUTS

Maximum external load capacitance from

Default strength

each output pin to DRGND CLOAD

Maximum strength

Differential load resistance between the LVDS output pairs (LVDS mode), RLOAD

100

HIGH PERFORMANCE MODES(2) (3)

High perf mode

Set this register bit to get best performance across Register address = 0x03,

sample clock and input signal frequencies

data = 0x03

High freq mode

Set these register bits for high input signal

frequencies (> 200 MHz)

data = 0x01

Operating free-air temperature, TA

–40

°C

(1)

See the THEORY OF OPERATION section in the Application Information

(2)

It is recommended to use these modes to get best performance.

(3)

See the SERIAL INTERFACE section for details on register programming.

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