STM32H533CE datasheet(131/231 Pages) STMICROELECTRONICS

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DS14539 Rev 1

131/231

STM32H533xx

Electrical characteristics

200

Table 57. I/O static characteristics(1)

Symbol

Parameter

Condition

Min

Typ

Max

Unit

VIL

I/O input low level voltage

except BOOT0

1.08 V < VDD < 3.6 V

0.3 VDDIOx(2)

I/O input low level voltage

except BOOT0

0.4 VDDIOx - 0.1(3)

BOOT0 I/O input low level

voltage

0.19 VDDIOx + 0.1(3)

VIH

I/O input high level

voltage except BOOT0

1.08 V < VDD < 3.6 V

0.7 VDDIOx(2)

I/O input high level

voltage except BOOT0

0.52 VDDIOx +

0.18(3)

BOOT0 I/O input high

level voltage

0.17 VDDIOx +

0.6(3)

VHYS(3)

TT_xx, FT_xxx and NRST

I/O input hysteresis

1.08 V < VDD < 3.6 V

250

BOOT0 I/O input

hysteresis

1.71 V < VDD < 3.6 V

200

Ileak(4)

FT_xx Input leakage

current(3)

0 < VIN ≤

Max(VDDXXX)(7)

±200

Max(VDDXXX) <

VIN ≤ Max(VDDXXX)+

1 V) (5)(7)

2500

Max(VDDXXX) < VIN ≤

5.5 V (5)(7)

750

TT_xx Input leakage

current

0< VIN ≤ Max(VDDXXX)

(7)

±200

BOOT0

0< VIN ≤ VDDOX

RPU

Weak pull-up

equivalent resistor(6)

VIN = VSS

kΩ

RPD

Weak pull-down

equivalent resistor(6)

VIN = VDD(7)

CIO

I/O pin capacitance

1. VDDIOx represents VDD or VDDIO2.

2. Compliant with CMOS requirements.

3. Specified by design - Not tested in production.

4. This parameter represents the pad leakage of the I/O itself. The total product pad leakage is provided by the following

formula: ITotal_Ieak_max = 10 μA + [number of I/Os where VIN is applied on the pad] ₓ Ilkg(Max).

5. VIN must be lower than Max(VDDXXX) + 3.6 V.

6. The pull-up and pull-down resistors are designed with a true resistance in series with a switchable PMOS/NMOS. This

PMOS/NMOS contribution to the series resistance is minimal (~10%).

7. Max(VDDXXX) is the maximum value of all the I/O supplies.

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