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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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STM32H533CE датащи(PDF) 59 Page - STMicroelectronics |
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STM32H533CE датащи(HTML) 59 Page - STMicroelectronics |
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59 / 231 page  DS14539 Rev 1 59/231 STM32H533xx Functional overview 60 • 2 receive FIFOs of three payloads each (up to 64 bytes per payload) • Separate signaling on reception of high priority messages • Configurable transmit FIFO / queue of three payload (up to 64 bytes per payload) • Configurable transmit Event FIFO • Programmable loop-back test mode • Maskable module interrupts • Two clock domains: APB bus interface and CAN core kernel clock • Power-down support 3.41 USB full speed (USB) USB main features • USB specification version 2.0 full-speed compliant • Host and device functions • 2048 bytes of dedicated SRAM data buffer memory with 32-bit access • USB clock recovery • Configurable number of endpoints from 1 to 8 • Cyclic redundancy check (CRC) generation/checking, non-return-to-zero inverted (NRZI) encoding/decoding and bit-stuffing • Isochronous transfers support • Double-buffered bulk/isochronous endpoint support • USB suspend/resume operations • Frame-locked clock pulse generation • USB 2.0 Link power management support • Battery charging specification revision 1.2 support in device 3.42 USB Type-C / USB Power Delivery controller (UCPD) The device embeds one controller (UCPD) compliant with USB Type-C Cable and Connector Specification release 2.0 and USB Power Delivery Rev. 3.0 specifications. The controller uses specific I/Os supporting the USB Type-C and USB power delivery requirements, featuring: • USB Type-C pull-up (Rp, all values) and pull-down (Rd) resistors • “Dead battery” support • USB power delivery message transmission and reception • FRS (fast role swap) support |
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