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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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STM32H533CE датащи(PDF) 135 Page - STMicroelectronics |
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STM32H533CE датащи(HTML) 135 Page - STMicroelectronics |
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135 / 231 page  DS14539 Rev 1 135/231 STM32H533xx Electrical characteristics 200 Output buffer timing characteristics (HSLV option disabled) The HSLV bit of GPIOx_HSLVR register can be used to optimize the I/O speed when the voltage is below 2.7 V. Table 61. Output voltage characteristics for PC14 and PC15(1) 1. The IIO current sourced or sunk by the device must always respect the absolute maximum rating specified in Table 17, and the sum of the currents sourced or sunk by all the I/Os (I/O ports and control pins) must always respect the absolute maximum ratings ΣIIO. Symbol Parameter Conditions(3) Min Max Unit VOL Output low level voltage CMOS port(2), IIO = 0.5 mA 2.7 V ≤ VDD ≤ 3.6 V 2. TTL and CMOS outputs are compatible with JEDEC standards JESD36 and JESD52. -0.4 V VOH Output high level voltage CMOS port(2), IIO = -0.5 mA 2.7 V ≤ VDD ≤ 3.6 V VDD - 0.4 - VOL(3) 3. Specified by design - Not tested in production. Output low level voltage TTL port(2), IIO = 0.5 mA 2.7 V ≤ VDD ≤ 3.6 V -0.4 VOH(3) Output high level voltage TTL port(2), IIO = -0.5 mA 2.7 V ≤ VDD ≤ 3.6 V 2.4 - VOL(3) Output low level voltage IIO = 0.25 mA 1.71 V ≤ VDD ≤ 3.6 V -0.4 VOH(3) Output high level voltage IIO = -0.25 mA 1.71 V ≤ VDD ≤ 3.6 V VDD - 0.4 - |
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