STM32H533CE datasheet(36/231 Pages) STMICROELECTRONICS

36 / 231 page

Functional overview

STM32H533xx

36/231

DS14539 Rev 1

3.18

Cyclic redundancy check calculation unit (CRC)

The CRC is used to get a CRC code using a configurable generator with polynomial value

and size.

Among other applications, the CRC-based techniques are used to verify data transmission

or storage integrity. In the scope of the EN/IEC 60335-1 standard, they offer a mean to verify

the flash memory integrity.

The CRC calculation unit helps to compute a signature of the software during runtime, which

can be ulteriorly compared with a reference signature generated at link-time and that can be

stored at a given memory location.

3.19

Flexible memory controller (FMC)

The FMC includes three memory controllers:

•

NOR/PSRAM memory controller

•

NAND memory controller

The main features of the FMC controller are the following:

•

Interface with static-memory mapped devices including:

–

Static random access memory (SRAM)

–

NOR flash memory/OneNAND flash memory

–

PSRAM (four memory banks)

–

NAND flash memory with ECC hardware to check up to 8 Kbytes of data

–

Ferroelectric RAM (FRAM)

•

8-,16- bit data bus width

•

Independent chip select control for each memory bank

•

Independent configuration for each memory bank

•

Write FIFO

3.19.1

LCD parallel interface

The FMC can be configured to interface seamlessly with most graphic LCD controllers. It

supports the Intel® 8080 and Motorola® 6800 modes, and is flexible enough to adapt to

specific LCD interfaces.

This LCD parallel interface capability makes it easy to build cost effective graphic

applications using LCD modules with embedded controllers or high-performance solutions

using external controllers with dedicated acceleration.

3.19.2

FMC TrustZone security

When the TrustZone security is enabled, the whole FMC banks are secure after reset. Non-

secure area can be configured using the TZSC MPCWMx controller.

•

The FMC NOR/PSRAM bank:

–

Up to two non-secure area can be configured thought the TZSC MPCWM2

controller with a 64-Kbyte granularity

•

The FMC NAND bank:

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