STM32H533CE datasheet(129/231 Pages) STMICROELECTRONICS

129 / 231 page

DS14539 Rev 1

129/231

STM32H533xx

Electrical characteristics

200

5.3.12

Absolute maximum ratings (electrical sensitivity)

Based on three different tests (ESD, LU) using specific measurement methods, the device is

stressed in order to determine its performance in terms of electrical sensitivity.

Electrostatic discharge (ESD)

Electrostatic discharges (a positive pulse followed by a negative one) are applied to the pins

of each sample according to each pin combination. This test conforms to the

ANSI/ESDA/JEDEC JS-001 and ANSI/ESDA/JEDEC JS-002 standards.

Static latchup

Two complementary static tests are required on six parts to assess the latchup

performance:

•

A supply overvoltage is applied to each power supply pin

•

A current injection is applied to each input, output and configurable I/O pin

These tests are compliant with JESD78 IC latchup standard.

Table 53. EMI characteristics

Symbol Parameter

Conditions

Monitored

frequency band

Max vs.

[fHSE/fCPU]

Unit

8/250 MHz

SEMI

Peak

level(1)

VDD = 3.6 V, TA = 25 °C, LQFP144 package,

conforming to IEC61967-2

0.1 to 30 MHz

dBµV

30 to 130 MHz

130 MHz to 1 GHz

1 GHz to 2 GHz

EMI level

1. Refer to the EMI radiated test chapter of application note AN1709 “EMC design guide for STM8, STM32 and Legacy

MCUs” available from the ST website www.st.com.

Table 54. ESD absolute maximum ratings

Symbol

Ratings

Conditions

Packages

Class

Maximum

value(1)

Unit

VESD(HBM)

Electrostatic discharge

voltage (human body

model)

TA = 25 °C conforming to

ANSI/ESDA/JEDEC JS-001

All packages

1000(2)

VESD(CDM)

Electrostatic discharge

voltage (charge device

model)

TA = +25 °C conforming to

ANSI/ESDA/JEDEC JS-002

All packages

C2a

500

1. Evaluated by characterization - Not tested in production.

2. The electrostatic discharge is 2000 V for all pins, except for NRST, PB13 and PB14 for which the test fails at 2000 V and

passes at 1400 V.

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