STM32H533CE datasheet(49/231 Pages) STMICROELECTRONICS

49 / 231 page

DS14539 Rev 1

49/231

STM32H533xx

Functional overview

–

RTC fully securable

–

Alarm A, alarm B, wake-up timer and timestamp individual secure or non-secure

configuration

–

Alarm A, alarm B, wake-up timer and timestamp individual privileged protection

The RTC is supplied through a switch that takes power either from the VDD supply when

present or from the VBAT pin.

The RTC clock sources can be one of the following:

•

32.768 kHz external crystal (LSE)

•

external resonator or oscillator (LSE)

•

internal low-power RC oscillator (LSI, with typical frequency of 32 kHz)

•

high-speed external clock (HSE), divided by a prescaler in the RCC.

The RTC is functional in VBAT mode and in all low-power modes when it is clocked by the

LSE. When clocked by the LSI, the RTC is not functional in VBAT mode, but is functional in

all low-power modes.

All RTC events (alarm, wake-up timer, timestamp) can generate an interrupt and wake up

the device from the low-power modes.

3.34.2

Tamper and backup registers (TAMP)

The anti-tamper detection circuit is used to protect sensitive data from external attacks.

32 32-bit backup registers are retained in all low-power modes and in VBAT mode. The

backup registers, as well as other secrets in the device, are protected by this anti-tamper

detection circuit with eight tamper pins and nine internal tampers. The external tamper pins

can be configured for edge detection, or level detection with or without filtering, or active

tamper that increases the security level by auto checking that the tamper pins are not

externally opened or shorted.

TAMP main features:

•

A tamper detection can erase the backup registers, backup SRAM, SRAM2, caches

and cryptographic peripherals.

•

32 32-bit backup registers:

–

The backup registers (TAMP_BKPxR) are implemented in the Backup domain that

remains powered-on by VBAT when the VDD power is switched off.

•

Up to 8 tamper pins for 8 external tamper detection events:

–

Active tamper mode: continuous comparison between tamper output and input to

protect from physical open-short attacks

–

Flexible active tamper I/O management: from 4 meshes (each input associated to

its own exclusive output) to 7 meshes (single output shared for up to 7 tamper

inputs)

–

Passive tampers: ultra-low power edge or level detection with internal pull-up

hardware management

–

Configurable digital filter

Note:

As input, only PC13, PA0, PA1, and PA2 are functional in Standby and VBAT modes. As

output, only PC13, and PA1 are functional in Standby and VBAT modes.

•

Internal tamper events to protect against transient or environmental perturbation

attacks

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