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TMP93CS41 датащи(PDF) 225 Page - Toshiba Semiconductor |
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TMP93CS41 датащи(HTML) 225 Page - Toshiba Semiconductor |
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225 / 248 page ![]() TMP93CS40/TMP93CS41 2004-02-10 93CS40-223 (1) I/O port Symbol Name Address 7 6 5 4 3 2 1 0 P07 P06 P05 P04 P03 P02 P01 P00 R/W Input mode P0 Port0 00H Undefined P17 P16 P15 P14 P13 P12 P11 P10 R/W Input mode P1 Port1 01H 0 0 0 0 0 0 0 0 P27 P26 P25 P24 P23 P22 P21 P20 * R/W (Note 3) Input mode P2 Port2 06H 0 0 0 0 0 0 0 0 P37 P36 P35 P34 P33 P32 P31 P30 (Note 1) *R/W (Note 3) Input mode Output mode P3 Port 3 07H 1 1 1 1 1 1 1 1 P42 P41 P40 * R/W (Note 3) Input mode P4 Port4 0CH 0 1 1 P57 P56 P55 P54 P53 P52 P51 P50 R P5 Port5 0DH Input mode P67 P66 P65 P64 P63 P62 P61 P60 *R/W (Note 3) Input mode P6 Port6 12H 1 1 1 1 1 1 1 1 P73 P72 P71 P70 *R/W (Note 3) Input mode P7 Port7 13H 1 1 1 1 P87 P86 P85 P84 P83 P82 P81 P80 *R/W (Note 3) Input mode P8 Port8 18H 1 1 1 1 1 1 1 1 P97 P96 P95 P94 P93 P92 P91 P90 R/W R/W *R/W (Note 3) Output mode Output mode Input mode P9 Port9 (Note2) 19H 1 1 1 1 1 1 1 1 PA7 PA6 PA5 PA4 PA3 PA2 PA1 PA0 R/W Input mode PA PortA 1EH 1 Note 1: When P30 pin is defined as RD signal output mode (P30F = 1), clearing the output latch register P30 to “0” outputs the RD strobe from P30 pin for PSRAM, even when the internal address is accessed. If the output latch register P30 remains “1”, the RD strobe is output only when the external address is accessed. Note 2: Port 96, 97 is also used as XT1, XT2. Therefore these pins are open-drain output type. Read/Write R/W: Either read or write is possible R: Only read is possible W: Only write is possible Prohibit RMW: Prohibit read-modify-write. (Prohibit RES/SET/TSET/CHG/STCF/ANDCF/ORCF/XORCF instruction.) Note 3: *R/W: Read-modify-write is prohibited when controlling the PU/PD resistors. |
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