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TMP93CS41 датащи(PDF) 174 Page - Toshiba Semiconductor |
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TMP93CS41 датащи(HTML) 174 Page - Toshiba Semiconductor |
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174 / 248 page ![]() TMP93CS40/TMP93CS41 2004-02-10 93CS40-172 7 6 5 4 3 2 1 0 Bit symbol − BR0CK1 BR0CK0 BR0S3 BR0S2 BR0S1 BR0S0 Read/Write R/W R/W After reset 0 0 0 0 0 0 0 Function Always fixed to 0 00: φT0 01: φT2 10: φT8 11: φT32 Divided frequency setting Note 1: Serial control register for channel 1 is BR1CR (57H). Note 2: Set TRUN<PRRUN> to 1 when the baud rate generator is used. Note 3: BR0CR<bit6> is always 1. Note 4: Don’t read from or write to BR0CR register during sending or receiving. Figure 3.11.4 Serial Channel Control (Channel 0, BR0CR) 7 6 5 4 3 2 1 0 TB7 TB6 TB5 TB4 TB3 TB2 TB1 TB0 (Transmission) 7 6 5 4 3 2 1 0 RB7 RB6 RB5 RB4 RB3 RB2 RB1 RB0 (Receiving) Note: Read-modify-write is prohibited for SC0BUF. Figure 3.11.5 Serial Transmission/Receiving Buffer Registers (Channel 0, SC0BUF) 0000 16 divisions 0001 Invalid 0010 to 1111 2 to 15 divisions Baud rate generator divided frequency setting 00 Internal clock φT0 01 Internal clock φT2 10 Internal clock φT8 11 Internal clock φT32 Baud rate generator input clock selection BR0CR (0053H) SC0BUF (0050H) |
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