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TMP93CS32F датащи(PDF) 130 Page - Toshiba Semiconductor

номер детали TMP93CS32F
подробное описание детали  CMOS 16-Bit Microcontroller
PDF  180 Pages
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производитель  TOSHIBA [Toshiba Semiconductor]
домашняя страница  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMP93CS32F датащи(HTML) 130 Page - Toshiba Semiconductor

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TMP93CS32
2004-02-10
93CS32-128
2. Receiving
In SCLK output mode, synchronous clock is outputted from SCLK0 pin and the
data are shifted in the receiving buffer 1 whenever the receive interrupt flag
INTES0<IRX0C> is cleared by reading the received data. When 8-bit data are
received, the data will be transferred in the receiving buffer 2 (SC0BUF) at the
timing shown below, and INTES0<IRX0C> will be set again to generate INTRX0
interrupt.
Figure 3.9.19 Receiving Operation in I/O Interface Mode (SCLK0 Output Mode)
In SCLK input mode, the data is shifted in the receiving buffer 1 when SCLK
input becomes active while the receive interrupt flag INTES0<IRX0C> is cleared
by reading the received data. When 8-bit data is received, the data will be shifted
in the receiving buffer 2 (SC0BUF) at the timing shown below, and
INTES0<IRX0C> will be set again to generate INTRX0 interrupt.
Figure 3.9.20 Receiving Operation in I/O Interface Mode (SCLK0 Input Mode)
Note:
For data receiving, the system must be placed in the receive enable state (SC0MOD<RXE>
= “1”).
Bit0
Bit1
Bit6
Bit7
Bit2
Generate
INTRX0
SCLK0 input
(SCLKS
= 0: Rising edge mode)
Timing to shift data in
the receiving buffer 2
SCLK0 input
(SCLKS
= 1: Falling edge mode)
RXD0
IRX0C
Bit0
Bit2
Bit6
Bit7
Timing to shift data in
the receiving buffer 2
SCLK0
RXD0
Bit1
Generate
INTRX0



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