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TMP93CS32F датащи(PDF) 129 Page - Toshiba Semiconductor |
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TMP93CS32F датащи(HTML) 129 Page - Toshiba Semiconductor |
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129 / 180 page ![]() TMP93CS32 2004-02-10 93CS32-127 1. Transmission In SCLK output mode, 8-bit data and synchronous clock are output from TXD0 pin and SCLK0 pin, respectively, each time the CPU writes data in the transmission buffer. When all data is output, INTES0<ITX0C> will be set to generate INTTX0 interrupt. Figure 3.9.17 Transmitting Operation in I/O Interface Mode (SCLK0 output mode) In SCLK output mode, 8-bit data are output from TXD0 pin when SCLK0 input becomes active while data are written in the transmission buffer by CPU. When all data are output, INTES0<ITX0C> will be set to generate INTTX0 interrupt. Figure 3.9.18 Transmitting Operation in I/O Interface Mode (SCLK0 input mode) SCLK0 output Bit0 Bit1 Bit6 Bit7 Timing to write transmission data TXD0 TXDSFT ITX0C (INTTX0 interrupt request) Bit0 Bit1 Bit6 Bit7 Bit5 SCLK0 input (SCLKS = 0: Rising edge mode) SCLK0 input (SCLKS = 1: Falling edge mode) TXDSFT TXD0 ITX0C (INTTX0 interrupt request) |
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